thumb32: Implement SXTAB16

This commit is contained in:
Lioncash 2021-02-10 16:13:34 -05:00
parent 1b5fcfd8d1
commit 6733cdd706
3 changed files with 17 additions and 1 deletions

View file

@ -200,7 +200,7 @@ INST(thumb32_SXTAH, "SXTAH", "111110100000nnnn1111dd
INST(thumb32_UXTH, "UXTH", "11111010000111111111dddd10rrmmmm")
INST(thumb32_UXTAH, "UXTAH", "111110100001nnnn1111dddd10rrmmmm")
INST(thumb32_SXTB16, "SXTB16", "11111010001011111111dddd10rrmmmm")
//INST(thumb32_SXTAB16, "SXTAB16", "111110100010----1111----1-------")
INST(thumb32_SXTAB16, "SXTAB16", "111110100010nnnn1111dddd10rrmmmm")
//INST(thumb32_UXTB16, "UXTB16", "11111010001111111111----1-------")
//INST(thumb32_UXTAB16, "UXTAB16", "111110100011----1111----1-------")
//INST(thumb32_SXTB, "SXTB", "11111010010011111111----1-------")

View file

@ -25,6 +25,21 @@ bool ThumbTranslatorVisitor::thumb32_SXTB16(Reg d, SignExtendRotation rotate, Re
return true;
}
bool ThumbTranslatorVisitor::thumb32_SXTAB16(Reg n, Reg d, SignExtendRotation rotate, Reg m) {
if (d == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto rotated = Rotate(ir, m, rotate);
const auto low_byte = ir.And(rotated, ir.Imm32(0x00FF00FF));
const auto sign_bit = ir.And(rotated, ir.Imm32(0x00800080));
const auto addend = ir.Or(low_byte, ir.Mul(sign_bit, ir.Imm32(0x1FE)));
const auto result = ir.PackedAddU16(addend, ir.GetRegister(n)).result;
ir.SetRegister(d, result);
return true;
}
bool ThumbTranslatorVisitor::thumb32_SXTH(Reg d, SignExtendRotation rotate, Reg m) {
if (d == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();

View file

@ -123,6 +123,7 @@ struct ThumbTranslatorVisitor final {
// thumb32 data processing (register) instructions
bool thumb32_SXTB16(Reg d, SignExtendRotation rotate, Reg m);
bool thumb32_SXTAB16(Reg n, Reg d, SignExtendRotation rotate, Reg m);
bool thumb32_SXTH(Reg d, SignExtendRotation rotate, Reg m);
bool thumb32_SXTAH(Reg n, Reg d, SignExtendRotation rotate, Reg m);
bool thumb32_UXTH(Reg d, SignExtendRotation rotate, Reg m);