A64: Implement FMADD

This commit is contained in:
MerryMage 2018-06-06 19:57:58 +01:00
parent 8c90fcf58e
commit 69e00d225c
2 changed files with 41 additions and 1 deletions

View file

@ -939,7 +939,7 @@ INST(FNMUL_float, "FNMUL (scalar)", "00011
INST(FCSEL_float, "FCSEL", "00011110yy1mmmmmcccc11nnnnnddddd")
// Data Processing - FP and SIMD - Floating point data processing three register
//INST(FMADD_float, "FMADD", "00011111yy0mmmmm0aaaaannnnnddddd")
INST(FMADD_float, "FMADD", "00011111yy0mmmmm0aaaaannnnnddddd")
//INST(FMSUB_float, "FMSUB", "00011111yy0mmmmm1aaaaannnnnddddd")
//INST(FNMADD_float, "FNMADD", "00011111yy1mmmmm0aaaaannnnnddddd")
//INST(FNMSUB_float, "FNMSUB", "00011111yy1mmmmm1aaaaannnnnddddd")

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@ -0,0 +1,40 @@
/* This file is part of the dynarmic project.
* Copyright (c) 2018 MerryMage
* This software may be used and distributed according to the terms of the GNU
* General Public License version 2 or any later version.
*/
#include <boost/optional.hpp>
#include "frontend/A64/translate/impl/impl.h"
namespace Dynarmic::A64 {
static boost::optional<size_t> GetDataSize(Imm<2> type) {
switch (type.ZeroExtend()) {
case 0b00:
return 32;
case 0b01:
return 64;
case 0b11:
// FP16Ext, unimplemented.
return boost::none;
}
return boost::none;
}
bool TranslatorVisitor::FMADD_float(Imm<2> type, Vec Vm, Vec Va, Vec Vn, Vec Vd) {
const auto datasize = GetDataSize(type);
if (!datasize || *datasize == 16) {
return UnallocatedEncoding();
}
const IR::U32U64 operanda = V_scalar(*datasize, Va);
const IR::U32U64 operand1 = V_scalar(*datasize, Vn);
const IR::U32U64 operand2 = V_scalar(*datasize, Vm);
const IR::U32U64 result = ir.FPMulAdd(operanda, operand1, operand2, true);
V_scalar(*datasize, Vd, result);
return true;
}
} // namespace Dynarmic::A64