mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

IR: Add IR instruction ZeroVector

Browse source
This commit is contained in:
MerryMage 2018-02-20 15:38:32 +00:00
parent 2721bb5ace
commit 710d09471b
5 changed files with 15 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/backend_x64/emit_x64_vector.cpp
View file

@ -1207,4 +1207,10 @@ void EmitX64::EmitVectorZeroUpper(EmitContext& ctx, IR::Inst* inst) {
ctx.reg_alloc.DefineValue(inst, a); ctx.reg_alloc.DefineValue(inst, a);
} }
void EmitX64::EmitZeroVector(EmitContext& ctx, IR::Inst* inst) {
Xbyak::Xmm a = ctx.reg_alloc.ScratchXmm();
code.pxor(a, a);
ctx.reg_alloc.DefineValue(inst, a);
}
} // namespace Dynarmic::BackendX64 } // namespace Dynarmic::BackendX64

6
src/frontend/A64/translate/impl/simd_two_register_misc.cpp
View file

@ -29,7 +29,7 @@ bool TranslatorVisitor::CMGT_zero_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
const size_t datasize = Q ? 128 : 64; const size_t datasize = Q ? 128 : 64;
const IR::U128 operand = V(datasize, Vn); const IR::U128 operand = V(datasize, Vn);
const IR::U128 zero = ir.ZeroExtendToQuad(ir.Imm64(0)); // TODO: Optimize const IR::U128 zero = ir.ZeroVector();
const IR::U128 result = ir.VectorGreaterSigned(esize, operand, zero); const IR::U128 result = ir.VectorGreaterSigned(esize, operand, zero);
V(datasize, Vd, result); V(datasize, Vd, result);
return true; return true;
@ -43,7 +43,7 @@ bool TranslatorVisitor::CMEQ_zero_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
const size_t datasize = Q ? 128 : 64; const size_t datasize = Q ? 128 : 64;
const IR::U128 operand = V(datasize, Vn); const IR::U128 operand = V(datasize, Vn);
const IR::U128 zero = ir.ZeroExtendToQuad(ir.Imm64(0)); // TODO: Optimize const IR::U128 zero = ir.ZeroVector();
IR::U128 result = ir.VectorEqual(esize, operand, zero); IR::U128 result = ir.VectorEqual(esize, operand, zero);
if (datasize == 64) { if (datasize == 64) {
result = ir.VectorZeroUpper(result); result = ir.VectorZeroUpper(result);
@ -60,7 +60,7 @@ bool TranslatorVisitor::CMLT_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
const size_t datasize = Q ? 128 : 64; const size_t datasize = Q ? 128 : 64;
const IR::U128 operand = V(datasize, Vn); const IR::U128 operand = V(datasize, Vn);
const IR::U128 zero = ir.ZeroExtendToQuad(ir.Imm64(0)); // TODO: Optimize const IR::U128 zero = ir.ZeroVector();
const IR::U128 result = ir.VectorLessSigned(esize, operand, zero); const IR::U128 result = ir.VectorLessSigned(esize, operand, zero);
V(datasize, Vd, result); V(datasize, Vd, result);
return true; return true;

4
src/frontend/ir/ir_emitter.cpp
View file

@ -1137,6 +1137,10 @@ U128 IREmitter::VectorZeroUpper(const U128& a) {
return Inst<U128>(Opcode::VectorZeroUpper, a); return Inst<U128>(Opcode::VectorZeroUpper, a);
} }
U128 IREmitter::ZeroVector() {
return Inst<U128>(Opcode::ZeroVector);
}
U32U64 IREmitter::FPAbs(const U32U64& a) { U32U64 IREmitter::FPAbs(const U32U64& a) {
if (a.GetType() == Type::U32) { if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::FPAbs32, a); return Inst<U32>(Opcode::FPAbs32, a);

1
src/frontend/ir/ir_emitter.h
View file

@ -241,6 +241,7 @@ public:
U128 VectorSub(size_t esize, const U128& a, const U128& b); U128 VectorSub(size_t esize, const U128& a, const U128& b);
U128 VectorZeroExtend(size_t original_esize, const U128& a); U128 VectorZeroExtend(size_t original_esize, const U128& a);
U128 VectorZeroUpper(const U128& a); U128 VectorZeroUpper(const U128& a);
U128 ZeroVector();
U32U64 FPAbs(const U32U64& a); U32U64 FPAbs(const U32U64& a);
U32U64 FPAdd(const U32U64& a, const U32U64& b, bool fpscr_controlled); U32U64 FPAdd(const U32U64& a, const U32U64& b, bool fpscr_controlled);

1
src/frontend/ir/opcodes.inc
View file

@ -288,6 +288,7 @@ OPCODE(VectorZeroExtend16, T::U128, T::U128
OPCODE(VectorZeroExtend32, T::U128, T::U128 ) OPCODE(VectorZeroExtend32, T::U128, T::U128 )
OPCODE(VectorZeroExtend64, T::U128, T::U128 ) OPCODE(VectorZeroExtend64, T::U128, T::U128 )
OPCODE(VectorZeroUpper, T::U128, T::U128 ) OPCODE(VectorZeroUpper, T::U128, T::U128 )
OPCODE(ZeroVector, T::U128, )
// Floating-point operations // Floating-point operations
OPCODE(FPAbs32, T::U32, T::U32 ) OPCODE(FPAbs32, T::U32, T::U32 )