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emit_arm64_a32: Fix A32SetCpsrNZC for immediate carry

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Merry 2022-07-30 19:10:50 +01:00 committed by merry
parent 33b3376fb1
commit 735f5b787a
1 changed files with 23 additions and 9 deletions
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18
src/dynarmic/backend/arm64/emit_arm64_a32.cpp
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@ -313,18 +313,32 @@ template<>
void EmitIR<IR::Opcode::A32SetCpsrNZC>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
// TODO: Track latent value
if (args[1].IsImmediate()) {
const u32 carry = args[1].GetImmediateU1() ? 0x2000'0000 : 0;
auto Wnz = ctx.reg_alloc.ReadW(args[0]);
RegAlloc::Realize(Wnz);
code.LDR(Wscratch0, Xstate, offsetof(A32JitState, cpsr_nzcv));
code.AND(Wscratch0, Wscratch0, 0x10000000);
code.ORR(Wscratch0, Wscratch0, Wnz);
if (carry) {
code.ORR(Wscratch0, Wscratch0, carry);
}
code.STR(Wscratch0, Xstate, offsetof(A32JitState, cpsr_nzcv));
} else {
auto Wnz = ctx.reg_alloc.ReadW(args[0]);
auto Wc = ctx.reg_alloc.ReadW(args[1]);
RegAlloc::Realize(Wnz, Wc);
// TODO: Track latent value
code.LDR(Wscratch0, Xstate, offsetof(A32JitState, cpsr_nzcv));
code.AND(Wscratch0, Wscratch0, 0x10000000);
code.ORR(Wscratch0, Wscratch0, Wnz);
code.ORR(Wscratch0, Wscratch0, Wc);
code.STR(Wscratch0, Xstate, offsetof(A32JitState, cpsr_nzcv));
}
}
template<>
void EmitIR<IR::Opcode::A32GetCFlag>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {