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emit_arm64_data_processing: Implement ByteReverse

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Merry 2022-07-24 18:33:07 +01:00 • committed by merry
parent 156bcecb02
commit 777d9a1045
1 changed files with 26 additions and 26 deletions
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52
src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
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@ -21,6 +21,17 @@ namespace Dynarmic::Backend::Arm64 {
using namespace oaknut::util; using namespace oaknut::util;
template<size_t bitsize, typename EmitFn>
static void EmitTwoOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
auto Rresult = ctx.reg_alloc.WriteReg<bitsize>(inst);
auto Roperand = ctx.reg_alloc.ReadReg<bitsize>(args[0]);
RegAlloc::Realize(Rresult, Roperand);
emit(Rresult, Roperand);
}
template<> template<>
void EmitIR<IR::Opcode::Pack2x32To1x64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::Pack2x32To1x64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto args = ctx.reg_alloc.GetArgumentInfo(inst);
@ -907,24 +918,16 @@ void EmitIR<IR::Opcode::Or64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR:
template<> template<>
void EmitIR<IR::Opcode::Not32>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::Not32>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst); EmitTwoOp<32>(
code, ctx, inst,
auto Wresult = ctx.reg_alloc.WriteW(inst); [&](auto& Wresult, auto& Woperand) { code.MVN(Wresult, Woperand); });
auto Wa = ctx.reg_alloc.ReadW(args[0]);
RegAlloc::Realize(Wresult, Wa);
code.MVN(Wresult, Wa);
} }
template<> template<>
void EmitIR<IR::Opcode::Not64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::Not64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst); EmitTwoOp<64>(
code, ctx, inst,
auto Xresult = ctx.reg_alloc.WriteX(inst); [&](auto& Xresult, auto& Xoperand) { code.MVN(Xresult, Xoperand); });
auto Xa = ctx.reg_alloc.ReadX(args[0]);
RegAlloc::Realize(Xresult, Xa);
code.MVN(Xresult, Xa);
} }
template<> template<>
@ -1017,26 +1020,23 @@ void EmitIR<IR::Opcode::ZeroExtendLongToQuad>(oaknut::CodeGenerator& code, EmitC
template<> template<>
void EmitIR<IR::Opcode::ByteReverseWord>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::ByteReverseWord>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; EmitTwoOp<32>(
(void)ctx; code, ctx, inst,
(void)inst; [&](auto& Wresult, auto& Woperand) { code.REV(Wresult, Woperand); });
ASSERT_FALSE("Unimplemented");
} }
template<> template<>
void EmitIR<IR::Opcode::ByteReverseHalf>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::ByteReverseHalf>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; EmitTwoOp<32>(
(void)ctx; code, ctx, inst,
(void)inst; [&](auto& Wresult, auto& Woperand) { code.REV16(Wresult, Woperand); });
ASSERT_FALSE("Unimplemented");
} }
template<> template<>
void EmitIR<IR::Opcode::ByteReverseDual>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::ByteReverseDual>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; EmitTwoOp<64>(
(void)ctx; code, ctx, inst,
(void)inst; [&](auto& Xresult, auto& Xoperand) { code.REV(Xresult, Xoperand); });
ASSERT_FALSE("Unimplemented");
} }
template<> template<>