status_register_access: SEL: Use GetGEFlags

This commit is contained in:
MerryMage 2016-11-23 19:47:35 +00:00
parent b6f7b8babd
commit 780ff8e00e

View file

@ -82,13 +82,7 @@ bool ArmTranslatorVisitor::arm_SEL(Cond cond, Reg n, Reg d, Reg m) {
return UnpredictableInstruction(); return UnpredictableInstruction();
if (ConditionPassed(cond)) { if (ConditionPassed(cond)) {
auto cpsr = ir.GetCpsr(); auto ge = ir.GetGEFlags();
auto to = ir.GetRegister(m);
auto from = ir.GetRegister(n);
auto zero = ir.Imm1(false);
// Extract bits 16:19 from the CPSR
auto bits = ir.And(ir.LogicalShiftRight(cpsr, ir.Imm8(16), zero).result, ir.Imm32(0xF));
// Perform some arithmetic to expand 0bXYZW into 0bXXXXXXXXYYYYYYYYZZZZZZZZWWWWWWWW => 0xXXYYZZWW // Perform some arithmetic to expand 0bXYZW into 0bXXXXXXXXYYYYYYYYZZZZZZZZWWWWWWWW => 0xXXYYZZWW
// The logic behind this is as follows: // The logic behind this is as follows:
@ -97,10 +91,12 @@ bool ArmTranslatorVisitor::arm_SEL(Cond cond, Reg n, Reg d, Reg m) {
// 0000 000x 0000 000y | 0000 000z 0000 000w (x & 0x01010101) // 0000 000x 0000 000y | 0000 000z 0000 000w (x & 0x01010101)
// xxxx xxxx yyyy yyyy | zzzz zzzz wwww wwww (x * 0xff) // xxxx xxxx yyyy yyyy | zzzz zzzz wwww wwww (x * 0xff)
auto x2 = ir.Mul(bits, ir.Imm32(0x00204081)); auto x2 = ir.Mul(ge, ir.Imm32(0x00204081));
auto x3 = ir.And(x2, ir.Imm32(0x01010101)); auto x3 = ir.And(x2, ir.Imm32(0x01010101));
auto mask = ir.Mul(x3, ir.Imm32(0xFF)); auto mask = ir.Mul(x3, ir.Imm32(0xFF));
auto to = ir.GetRegister(m);
auto from = ir.GetRegister(n);
auto result = ir.Or(ir.And(from, mask), ir.And(to, ir.Not(mask))); auto result = ir.Or(ir.And(from, mask), ir.And(to, ir.Not(mask)));
ir.SetRegister(d, result); ir.SetRegister(d, result);
} }