mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

A64: Zero upper 64 bits in ORN if using the 64-bit variant

Browse source 
Resolves a TODO
This commit is contained in:
Lioncash 2018-01-26 12:00:27 -05:00 committed by MerryMage
parent d3b1a72bca
commit 7abd673a49
1 changed files with 4 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
src/frontend/A64/translate/impl/simd_three_same.cpp
View file

@ -123,9 +123,12 @@ bool TranslatorVisitor::ORN_asimd(bool Q, Vec Vm, Vec Vn, Vec Vd) {
auto operand1 = V(datasize, Vn); auto operand1 = V(datasize, Vn);
auto operand2 = V(datasize, Vm); auto operand2 = V(datasize, Vm);
// TODO: This does not zero the upper 64 bits when datasize == 64. This may break future optimization passes.
auto result = ir.VectorOr(operand1, ir.VectorNot(operand2)); auto result = ir.VectorOr(operand1, ir.VectorNot(operand2));
if (datasize == 64) {
result = ir.VectorZeroUpper(result);
}
V(datasize, Vd, result); V(datasize, Vd, result);
return true; return true;