emit_x64_vector_floating_point: AVX && DN implementation of EmitFPVectorMulX
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7c8fcaef26
1 changed files with 22 additions and 2 deletions
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@ -362,7 +362,7 @@ void EmitThreeOpVectorOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* i
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template<typename Lambda>
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void EmitTwoOpFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lambda lambda) {
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const auto fn = static_cast<mp::equivalent_function_type_t<Lambda>*>(lambda);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm arg1 = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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@ -960,6 +960,26 @@ static void EmitFPVectorMulX(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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if (ctx.FPSCR_DN() && code.DoesCpuSupport(Xbyak::util::Cpu::tAVX)) {
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const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm operand = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm twos = ctx.reg_alloc.ScratchXmm();
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FCODE(vcmpunordp)(xmm0, result, operand);
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FCODE(vxorp)(twos, result, operand);
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FCODE(mulp)(result, operand);
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FCODE(andp)(twos, GetNegativeZeroVector<fsize>(code));
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FCODE(vcmpunordp)(tmp, result, result);
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FCODE(blendvp)(result, GetNaNVector<fsize>(code));
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FCODE(orp)(twos, GetVectorOf<fsize, false, 0, 2>(code));
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FCODE(andnp)(xmm0, tmp);
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FCODE(blendvp)(result, twos);
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ctx.reg_alloc.DefineValue(inst, result);
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return;
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}
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const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm xmm_a = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm xmm_b = ctx.reg_alloc.UseXmm(args[1]);
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@ -1052,7 +1072,7 @@ void EmitX64::EmitFPVectorPairedAddLower64(EmitContext& ctx, IR::Inst* inst) {
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EmitThreeOpVectorOperation<64, PairedLowerIndexer>(code, ctx, inst, [&](Xbyak::Xmm result, Xbyak::Xmm xmm_b) {
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const Xbyak::Xmm zero = ctx.reg_alloc.ScratchXmm();
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code.xorps(zero, zero);
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code.punpcklqdq(result, xmm_b);
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code.punpcklqdq(result, xmm_b);
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code.haddpd(result, zero);
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});
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}
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