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A64: Implement ABS (scalar)

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Lioncash 2018-04-18 09:42:11 -04:00 committed by MerryMage
parent c8eb4528be
commit 7f47402609
2 changed files with 14 additions and 1 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -410,7 +410,7 @@ INST(UCVTF_int_2, "UCVTF (vector, integer)", "01111
INST(CMGT_zero_1, "CMGT (zero)", "01011110zz100000100010nnnnnddddd")
INST(CMEQ_zero_1, "CMEQ (zero)", "01011110zz100000100110nnnnnddddd")
//INST(CMLT_1, "CMLT (zero)", "01011110zz100000101010nnnnnddddd")
//INST(ABS_1, "ABS", "01011110zz100000101110nnnnnddddd")
INST(ABS_1, "ABS", "01011110zz100000101110nnnnnddddd")
//INST(SQXTN_1, "SQXTN, SQXTN2", "01011110zz100001010010nnnnnddddd")
//INST(USQADD_1, "USQADD", "01111110zz100000001110nnnnnddddd")
//INST(SQNEG_1, "SQNEG", "01111110zz100000011110nnnnnddddd")

13
src/frontend/A64/translate/impl/simd_scalar_two_register_misc.cpp
View file

@ -8,6 +8,19 @@
namespace Dynarmic::A64 {
bool TranslatorVisitor::ABS_1(Imm<2> size, Vec Vn, Vec Vd) {
if (size != 0b11) {
return ReservedValue();
}
const IR::U64 operand1 = V_scalar(64, Vn);
const IR::U64 operand2 = ir.ArithmeticShiftRight(operand1, ir.Imm8(63));
const IR::U64 result = ir.Sub(ir.Eor(operand1, operand2), operand2);
V_scalar(64, Vd, result);
return true;
}
bool TranslatorVisitor::NEG_1(Imm<2> size, Vec Vn, Vec Vd) {
if (size != 0b11) {
return ReservedValue();