Remove unnecessary explicit includes (#16)

src/backend_x64/emit_x64.cpp

@@ -4,14 +4,17 @@
  * General Public License version 2 or any later version.
  */
 
-#include <map>
 #include <unordered_map>
 #include <common/bit_util.h>
 
+#include <xbyak.h>
+
 #include "backend_x64/abi.h"
 #include "backend_x64/emit_x64.h"
 #include "backend_x64/jitstate.h"
 #include "frontend/arm_types.h"
+#include "frontend/ir/basic_block.h"
+#include "frontend/ir/microinstruction.h"
 
 // TODO: Have ARM flags in host flags and not have them use up GPR registers unless necessary.
 // TODO: Actually implement that proper instruction selector you've always wanted to sweetheart.

src/backend_x64/emit_x64.h

@@ -6,22 +6,26 @@
 
 #pragma once
 
-#include <set>
 #include <unordered_map>
 #include <vector>
 
 #include <boost/optional.hpp>
-#include <xbyak.h>
 
 #include "backend_x64/block_of_code.h"
 #include "backend_x64/reg_alloc.h"
 #include "dynarmic/callbacks.h"
 #include "frontend/arm_types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/microinstruction.h"
 #include "frontend/ir/terminal.h"
 
 namespace Dynarmic {
+
+class Jit;
+
+namespace IR {
+class Block;
+class Inst;
+} // namespace IR
+
 namespace BackendX64 {
 
 class EmitX64 final {

src/backend_x64/interface_x64.cpp

@@ -17,11 +17,11 @@
 #include "backend_x64/emit_x64.h"
 #include "backend_x64/jitstate.h"
 #include "common/assert.h"
-#include "common/bit_util.h"
 #include "common/common_types.h"
 #include "common/scope_exit.h"
 #include "dynarmic/dynarmic.h"
 #include "frontend/arm_types.h"
+#include "frontend/ir/basic_block.h"
 #include "frontend/translate/translate.h"
 #include "ir_opt/passes.h"
 

src/backend_x64/reg_alloc.cpp

@@ -5,7 +5,6 @@
  */
 
 #include <algorithm>
-#include <map>
 
 #include <xbyak.h>
 

src/backend_x64/reg_alloc.h

@@ -7,7 +7,6 @@
 #pragma once
 
 #include <array>
-#include <map>
 #include <vector>
 
 #include <boost/optional.hpp>
@@ -15,7 +14,6 @@
 
 #include "backend_x64/block_of_code.h"
 #include "backend_x64/hostloc.h"
-#include "backend_x64/jitstate.h"
 #include "common/common_types.h"
 #include "frontend/ir/microinstruction.h"
 #include "frontend/ir/value.h"

src/common/bit_util.h

@@ -8,9 +8,9 @@
 
 #include <bitset>
 #include <climits>
+#include <cstddef>
 
 #include "common/assert.h"
-#include "common/common_types.h"
 
 #ifdef _MSC_VER
 #include <intrin.h>

src/common/intrusive_list.h

@@ -6,12 +6,12 @@
 
 #pragma once
 
+#include <cstddef>
 #include <iterator>
 #include <memory>
 #include <type_traits>
 
 #include "common/assert.h"
-#include "common/common_types.h"
 
 namespace Dynarmic {
 namespace Common {

src/common/memory_pool.h

@@ -6,10 +6,9 @@
 
 #pragma once
 
+#include <cstddef>
 #include <vector>
 
-#include "common/common_types.h"
-
 namespace Dynarmic {
 namespace Common {
 

src/common/mp.h

@@ -6,8 +6,8 @@
 
 #pragma once
 
+#include <cstddef>
 #include <tuple>
-#include "common/common_types.h"
 
 namespace Dynarmic {
 namespace mp {

src/frontend/ir/ir_emitter.cpp

@@ -5,7 +5,8 @@
  */
 
 #include "common/assert.h"
-#include "ir_emitter.h"
+#include "frontend/ir/ir_emitter.h"
+#include "frontend/ir/opcodes.h"
 
 namespace Dynarmic {
 namespace IR {

src/frontend/ir/ir_emitter.h

@@ -11,7 +11,6 @@
 #include "common/common_types.h"
 #include "frontend/arm_types.h"
 #include "frontend/ir/basic_block.h"
-#include "frontend/ir/opcodes.h"
 #include "frontend/ir/terminal.h"
 #include "frontend/ir/value.h"
 
@@ -25,6 +24,8 @@
 namespace Dynarmic {
 namespace IR {
 
+enum class Opcode;
+
 /**
  * Convenience class to construct a basic block of the intermediate representation.
  * `block` is the resulting block.

src/ir_opt/dead_code_elimination_pass.cpp

@@ -4,9 +4,7 @@
  * General Public License version 2 or any later version.
  */
 
-#include "common/assert.h"
 #include "frontend/ir/basic_block.h"
-#include "frontend/ir/opcodes.h"
 #include "ir_opt/passes.h"
 
 namespace Dynarmic {