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A64/translate: Amend I() to also handle u8 and u16 immediates

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Lioncash 2018-04-03 18:23:46 -04:00 committed by MerryMage
parent c490a45af6
commit 80e005e5b5
2 changed files with 6 additions and 2 deletions
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6
src/frontend/A64/translate/impl/impl.cpp
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@ -116,8 +116,12 @@ u64 TranslatorVisitor::AdvSIMDExpandImm(bool op, Imm<4> cmode, Imm<8> imm8) {
return 0; return 0;
} }
IR::U32U64 TranslatorVisitor::I(size_t bitsize, u64 value) { IR::UAny TranslatorVisitor::I(size_t bitsize, u64 value) {
switch (bitsize) { switch (bitsize) {
case 8:
return ir.Imm8(static_cast<u8>(value));
case 16:
return ir.Imm16(static_cast<u16>(value));
case 32: case 32:
return ir.Imm32(static_cast<u32>(value)); return ir.Imm32(static_cast<u32>(value));
case 64: case 64:

2
src/frontend/A64/translate/impl/impl.h
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@ -44,7 +44,7 @@ struct TranslatorVisitor final {
boost::optional<BitMasks> DecodeBitMasks(bool N, Imm<6> immr, Imm<6> imms, bool immediate); boost::optional<BitMasks> DecodeBitMasks(bool N, Imm<6> immr, Imm<6> imms, bool immediate);
u64 AdvSIMDExpandImm(bool op, Imm<4> cmode, Imm<8> imm8); u64 AdvSIMDExpandImm(bool op, Imm<4> cmode, Imm<8> imm8);
IR::U32U64 I(size_t bitsize, u64 value); IR::UAny I(size_t bitsize, u64 value);
IR::UAny X(size_t bitsize, Reg reg); IR::UAny X(size_t bitsize, Reg reg);
void X(size_t bitsize, Reg reg, IR::U32U64 value); void X(size_t bitsize, Reg reg, IR::U32U64 value);
IR::U32U64 SP(size_t bitsize); IR::U32U64 SP(size_t bitsize);