A64: Implement FCCMPE
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2 changed files with 17 additions and 1 deletions
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@ -913,7 +913,7 @@ INST(FMOV_float_imm, "FMOV (scalar, immediate)", "00011
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// Data Processing - FP and SIMD - Floating point conditional compare
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// Data Processing - FP and SIMD - Floating point conditional compare
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INST(FCCMP_float, "FCCMP", "00011110yy1mmmmmcccc01nnnnn0ffff")
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INST(FCCMP_float, "FCCMP", "00011110yy1mmmmmcccc01nnnnn0ffff")
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//INST(FCCMPE_float, "FCCMPE", "00011110yy1mmmmmcccc01nnnnn1ffff")
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INST(FCCMPE_float, "FCCMPE", "00011110yy1mmmmmcccc01nnnnn1ffff")
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// Data Processing - FP and SIMD - Floating point data processing two register
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// Data Processing - FP and SIMD - Floating point data processing two register
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INST(FMUL_float, "FMUL (scalar)", "00011110yy1mmmmm000010nnnnnddddd")
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INST(FMUL_float, "FMUL (scalar)", "00011110yy1mmmmm000010nnnnnddddd")
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@ -38,4 +38,20 @@ bool TranslatorVisitor::FCCMP_float(Imm<2> type, Vec Vm, Cond cond, Vec Vn, Imm<
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return true;
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return true;
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}
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}
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bool TranslatorVisitor::FCCMPE_float(Imm<2> type, Vec Vm, Cond cond, Vec Vn, Imm<4> nzcv) {
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const auto datasize = GetDataSize(type);
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if (!datasize || *datasize == 16) {
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return UnallocatedEncoding();
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}
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const u32 flags = nzcv.ZeroExtend<u32>() << 28;
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const IR::U32U64 operand1 = V_scalar(*datasize, Vn);
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const IR::U32U64 operand2 = V_scalar(*datasize, Vm);
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const IR::NZCV then_flags = ir.FPCompare(operand1, operand2, true, true);
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const IR::NZCV else_flags = ir.NZCVFromPackedFlags(ir.Imm32(flags));
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ir.SetNZCV(ir.ConditionalSelect(cond, then_flags, else_flags));
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return true;
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}
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} // namespace Dynarmic::A64
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} // namespace Dynarmic::A64
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