ir: Extend FPVectorAbs opcode to also handle 16-bit elements for FP16
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3 changed files with 14 additions and 0 deletions
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@ -195,6 +195,17 @@ void EmitX64::EmitFPVectorAbsoluteDifference64(EmitContext& ctx, IR::Inst* inst)
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ctx.reg_alloc.DefineValue(inst, a);
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ctx.reg_alloc.DefineValue(inst, a);
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}
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}
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void EmitX64::EmitFPVectorAbs16(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Address mask = code.MConst(xword, 0x7FFF7FFF7FFF7FFF, 0x7FFF7FFF7FFF7FFF);
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code.pand(a, mask);
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ctx.reg_alloc.DefineValue(inst, a);
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}
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void EmitX64::EmitFPVectorAbs32(EmitContext& ctx, IR::Inst* inst) {
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void EmitX64::EmitFPVectorAbs32(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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@ -1493,6 +1493,8 @@ U64 IREmitter::FPU32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_con
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U128 IREmitter::FPVectorAbs(size_t esize, const U128& a) {
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U128 IREmitter::FPVectorAbs(size_t esize, const U128& a) {
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switch (esize) {
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switch (esize) {
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case 16:
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return Inst<U128>(Opcode::FPVectorAbs16, a);
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case 32:
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case 32:
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return Inst<U128>(Opcode::FPVectorAbs32, a);
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return Inst<U128>(Opcode::FPVectorAbs32, a);
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case 64:
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case 64:
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@ -396,6 +396,7 @@ OPCODE(FPU32ToDouble, T::U64, T::U32, T::U
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OPCODE(FPS32ToDouble, T::U64, T::U32, T::U1 )
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OPCODE(FPS32ToDouble, T::U64, T::U32, T::U1 )
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// Floating-point vector instructions
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// Floating-point vector instructions
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OPCODE(FPVectorAbs16, T::U128, T::U128 )
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OPCODE(FPVectorAbs32, T::U128, T::U128 )
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OPCODE(FPVectorAbs32, T::U128, T::U128 )
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OPCODE(FPVectorAbs64, T::U128, T::U128 )
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OPCODE(FPVectorAbs64, T::U128, T::U128 )
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OPCODE(FPVectorAbsoluteDifference32, T::U128, T::U128, T::U128 )
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OPCODE(FPVectorAbsoluteDifference32, T::U128, T::U128, T::U128 )
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