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ir: Extend FPVectorAbs opcode to also handle 16-bit elements for FP16

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Lioncash 2018-07-07 14:48:16 -04:00 committed by MerryMage
parent 53dbb6a92a
commit 81e572c78c
3 changed files with 14 additions and 0 deletions
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11
src/backend_x64/emit_x64_vector_floating_point.cpp
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@ -195,6 +195,17 @@ void EmitX64::EmitFPVectorAbsoluteDifference64(EmitContext& ctx, IR::Inst* inst)
ctx.reg_alloc.DefineValue(inst, a);
}
void EmitX64::EmitFPVectorAbs16(EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
const Xbyak::Address mask = code.MConst(xword, 0x7FFF7FFF7FFF7FFF, 0x7FFF7FFF7FFF7FFF);
code.pand(a, mask);
ctx.reg_alloc.DefineValue(inst, a);
}
void EmitX64::EmitFPVectorAbs32(EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);

2
src/frontend/ir/ir_emitter.cpp
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@ -1493,6 +1493,8 @@ U64 IREmitter::FPU32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_con
U128 IREmitter::FPVectorAbs(size_t esize, const U128& a) {
switch (esize) {
case 16:
return Inst<U128>(Opcode::FPVectorAbs16, a);
case 32:
return Inst<U128>(Opcode::FPVectorAbs32, a);
case 64:

1
src/frontend/ir/opcodes.inc
View file

@ -396,6 +396,7 @@ OPCODE(FPU32ToDouble, T::U64, T::U32, T::U
OPCODE(FPS32ToDouble, T::U64, T::U32, T::U1 )
// Floating-point vector instructions
OPCODE(FPVectorAbs16, T::U128, T::U128 )
OPCODE(FPVectorAbs32, T::U128, T::U128 )
OPCODE(FPVectorAbs64, T::U128, T::U128 )
OPCODE(FPVectorAbsoluteDifference32, T::U128, T::U128, T::U128 )