A64: Implement branch
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parent
0641445e51
commit
86d1095df7
5 changed files with 49 additions and 6 deletions
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@ -58,6 +58,7 @@ add_library(dynarmic
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frontend/A64/ir_emitter.h
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frontend/A64/ir_emitter.h
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frontend/A64/location_descriptor.cpp
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frontend/A64/location_descriptor.cpp
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frontend/A64/location_descriptor.h
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frontend/A64/location_descriptor.h
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frontend/A64/translate/impl/branch.cpp
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frontend/A64/translate/impl/data_processing_addsub.cpp
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frontend/A64/translate/impl/data_processing_addsub.cpp
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frontend/A64/translate/impl/data_processing_logical.cpp
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frontend/A64/translate/impl/data_processing_logical.cpp
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frontend/A64/translate/impl/data_processing_pcrel.cpp
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frontend/A64/translate/impl/data_processing_pcrel.cpp
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@ -266,7 +266,7 @@ void A64EmitX64::EmitPatchJg(const IR::LocationDescriptor& target_desc, CodePtr
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code->mov(qword[r15 + offsetof(A64JitState, pc)], A64::LocationDescriptor{target_desc}.PC());
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code->mov(qword[r15 + offsetof(A64JitState, pc)], A64::LocationDescriptor{target_desc}.PC());
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code->jg(code->GetReturnFromRunCodeAddress());
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code->jg(code->GetReturnFromRunCodeAddress());
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}
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}
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code->EnsurePatchLocationSize(patch_location, 14);
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code->EnsurePatchLocationSize(patch_location, 17);
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}
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}
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void A64EmitX64::EmitPatchJmp(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr) {
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void A64EmitX64::EmitPatchJmp(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr) {
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@ -277,7 +277,7 @@ void A64EmitX64::EmitPatchJmp(const IR::LocationDescriptor& target_desc, CodePtr
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code->mov(qword[r15 + offsetof(A64JitState, pc)], A64::LocationDescriptor{target_desc}.PC());
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code->mov(qword[r15 + offsetof(A64JitState, pc)], A64::LocationDescriptor{target_desc}.PC());
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code->jmp(code->GetReturnFromRunCodeAddress());
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code->jmp(code->GetReturnFromRunCodeAddress());
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}
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}
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code->EnsurePatchLocationSize(patch_location, 13);
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code->EnsurePatchLocationSize(patch_location, 16);
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}
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}
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void A64EmitX64::EmitPatchMovRcx(CodePtr target_code_ptr) {
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void A64EmitX64::EmitPatchMovRcx(CodePtr target_code_ptr) {
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@ -59,7 +59,7 @@ std::vector<Matcher<V>> GetDecodeTable() {
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//INST(&V::EXTR, "EXTR", "z00100111N0mmmmmssssssnnnnnddddd"),
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//INST(&V::EXTR, "EXTR", "z00100111N0mmmmmssssssnnnnnddddd"),
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// Conditional branch
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// Conditional branch
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//INST(&V::B_cond, "B.cond", "01010100iiiiiiiiiiiiiiiiiii0cccc"),
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INST(&V::B_cond, "B.cond", "01010100iiiiiiiiiiiiiiiiiii0cccc"),
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// Exception generation
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// Exception generation
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//INST(&V::SVC, "SVC", "11010100000iiiiiiiiiiiiiiii00001"),
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//INST(&V::SVC, "SVC", "11010100000iiiiiiiiiiiiiiii00001"),
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@ -113,8 +113,8 @@ std::vector<Matcher<V>> GetDecodeTable() {
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//INST(&V::DRPS, "DRPS", "11010110101111110000001111100000"),
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//INST(&V::DRPS, "DRPS", "11010110101111110000001111100000"),
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// Unconditonal branch (immediate)
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// Unconditonal branch (immediate)
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//INST(&V::B_uncond, "B", "000101iiiiiiiiiiiiiiiiiiiiiiiiii"),
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INST(&V::B_uncond, "B", "000101iiiiiiiiiiiiiiiiiiiiiiiiii"),
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//INST(&V::BL, "BL", "100101iiiiiiiiiiiiiiiiiiiiiiiiii"),
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INST(&V::BL, "BL", "100101iiiiiiiiiiiiiiiiiiiiiiiiii"),
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// Compare and branch (immediate)
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// Compare and branch (immediate)
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//INST(&V::CBZ, "CBZ", "z0110100iiiiiiiiiiiiiiiiiiittttt"),
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//INST(&V::CBZ, "CBZ", "z0110100iiiiiiiiiiiiiiiiiiittttt"),
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@ -44,7 +44,7 @@ public:
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return !operator==(o);
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return !operator==(o);
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}
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}
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LocationDescriptor SetPC(u32 new_pc) const {
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LocationDescriptor SetPC(u64 new_pc) const {
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return LocationDescriptor(new_pc, fpcr);
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return LocationDescriptor(new_pc, fpcr);
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}
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}
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42
src/frontend/A64/translate/impl/branch.cpp
Normal file
42
src/frontend/A64/translate/impl/branch.cpp
Normal file
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@ -0,0 +1,42 @@
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/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "frontend/A64/translate/impl/impl.h"
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namespace Dynarmic {
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namespace A64 {
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bool TranslatorVisitor::B_cond(Imm<19> imm19, Cond cond) {
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s64 offset = concatenate(imm19, Imm<2>{0}).SignExtend<s64>();
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u64 target = ir.PC() + offset;
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auto cond_pass = IR::Term::LinkBlock{ir.current_location.SetPC(target)};
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auto cond_fail = IR::Term::LinkBlock{ir.current_location.AdvancePC(4)};
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ir.SetTerm(IR::Term::If{cond, cond_pass, cond_fail});
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return false;
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}
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bool TranslatorVisitor::B_uncond(Imm<26> imm26) {
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s64 offset = concatenate(imm26, Imm<2>{0}).SignExtend<s64>();
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u64 target = ir.PC() + offset;
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ir.SetTerm(IR::Term::LinkBlock{ir.current_location.SetPC(target)});
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return false;
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}
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bool TranslatorVisitor::BL(Imm<26> imm26) {
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s64 offset = concatenate(imm26, Imm<2>{0}).SignExtend<s64>();
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X(64, Reg::R30, ir.Imm64(ir.PC() + 4));
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ir.PushRSB(ir.current_location.AdvancePC(4));
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u64 target = ir.PC() + offset;
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ir.SetTerm(IR::Term::LinkBlock{ir.current_location.SetPC(target)});
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return false;
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}
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} // namespace A64
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} // namespace Dynarmic
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