A64: Implement SHL (scalar)
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3 changed files with 28 additions and 1 deletions
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@ -106,6 +106,7 @@ add_library(dynarmic
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frontend/A64/translate/impl/simd_modified_immediate.cpp
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frontend/A64/translate/impl/simd_modified_immediate.cpp
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frontend/A64/translate/impl/simd_permute.cpp
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frontend/A64/translate/impl/simd_permute.cpp
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frontend/A64/translate/impl/simd_scalar_pairwise.cpp
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frontend/A64/translate/impl/simd_scalar_pairwise.cpp
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frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp
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frontend/A64/translate/impl/simd_scalar_three_same.cpp
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frontend/A64/translate/impl/simd_scalar_three_same.cpp
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frontend/A64/translate/impl/simd_scalar_two_register_misc.cpp
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frontend/A64/translate/impl/simd_scalar_two_register_misc.cpp
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frontend/A64/translate/impl/simd_sha.cpp
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frontend/A64/translate/impl/simd_sha.cpp
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@ -471,7 +471,7 @@ INST(SUB_1, "SUB (vector)", "01111
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//INST(SSRA_1, "SSRA", "010111110IIIIiii000101nnnnnddddd")
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//INST(SSRA_1, "SSRA", "010111110IIIIiii000101nnnnnddddd")
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//INST(SRSHR_1, "SRSHR", "010111110IIIIiii001001nnnnnddddd")
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//INST(SRSHR_1, "SRSHR", "010111110IIIIiii001001nnnnnddddd")
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//INST(SRSRA_1, "SRSRA", "010111110IIIIiii001101nnnnnddddd")
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//INST(SRSRA_1, "SRSRA", "010111110IIIIiii001101nnnnnddddd")
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//INST(SHL_1, "SHL", "010111110IIIIiii010101nnnnnddddd")
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INST(SHL_1, "SHL", "010111110IIIIiii010101nnnnnddddd")
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//INST(SQSHL_imm_1, "SQSHL (immediate)", "010111110IIIIiii011101nnnnnddddd")
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//INST(SQSHL_imm_1, "SQSHL (immediate)", "010111110IIIIiii011101nnnnnddddd")
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//INST(SQSHRN_1, "SQSHRN, SQSHRN2", "010111110IIIIiii100101nnnnnddddd")
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//INST(SQSHRN_1, "SQSHRN, SQSHRN2", "010111110IIIIiii100101nnnnnddddd")
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//INST(SQRSHRN_1, "SQRSHRN, SQRSHRN2", "010111110IIIIiii100111nnnnnddddd")
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//INST(SQRSHRN_1, "SQRSHRN, SQRSHRN2", "010111110IIIIiii100111nnnnnddddd")
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@ -0,0 +1,26 @@
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/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "frontend/A64/translate/impl/impl.h"
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namespace Dynarmic::A64 {
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bool TranslatorVisitor::SHL_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
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if (!immh.Bit<3>()) {
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return ReservedValue();
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}
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const size_t esize = 64;
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const u8 shift_amount = static_cast<u8>(concatenate(immh, immb).ZeroExtend() - esize);
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const IR::U64 operand = V_scalar(esize, Vn);
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const IR::U64 result = ir.LogicalShiftLeft(operand, ir.Imm8(shift_amount));
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V_scalar(esize, Vd, result);
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return true;
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}
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} // namespace Dynarmic::A64
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