tests: Add F{MIN,MAX} tests
Very minimal tests that includes some denormals and {Q,S}NANs
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@ -454,6 +454,50 @@ TEST_CASE("A64: FABD", "[a64]") {
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REQUIRE(jit.GetVector(22) == Vector{0x56d3f0857fc90e2b, 0x6e4b0a4144873176});
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REQUIRE(jit.GetVector(22) == Vector{0x56d3f0857fc90e2b, 0x6e4b0a4144873176});
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}
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}
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TEST_CASE("A64: FMIN", "[a64]") {
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A64TestEnv env;
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x4ea1f400); // FMIN.4S V0, V0, V1
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env.code_mem.emplace_back(0x4ee3f442); // FMIN.2D V2, V2, V3
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env.code_mem.emplace_back(0x14000000); // B .
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jit.SetPC(0);
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jit.SetVector(0, {0x7fc00000'09503366, 0x00000000'7f984a37});
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jit.SetVector(1, {0xc1200000'00000001, 0x6e4b0a41'ffffffff});
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jit.SetVector(2, {0x7fc0000009503366, 0x3ff0000000000000});
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jit.SetVector(3, {0xbff0000000000000, 0x6e4b0a41ffffffff});
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env.ticks_left = 2;
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jit.Run();
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REQUIRE(jit.GetVector(0) == Vector{0x7fc00000'00000001, 0x00000000'7fd84a37});
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REQUIRE(jit.GetVector(2) == Vector{0xbff0000000000000, 0x3ff0000000000000});
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}
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TEST_CASE("A64: FMAX", "[a64]") {
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A64TestEnv env;
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x4e21f400); // FMAX.4S V0, V0, V1
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env.code_mem.emplace_back(0x4e63f442); // FMAX.2D V2, V2, V3
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env.code_mem.emplace_back(0x14000000); // B .
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jit.SetPC(0);
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jit.SetVector(0, {0x7fc00000'09503366, 0x00000000'7f984a37});
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jit.SetVector(1, {0xc1200000'00000001, 0x6e4b0a41'ffffffff});
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jit.SetVector(2, {0x7fc0000009503366, 0x3ff0000000000000});
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jit.SetVector(3, {0xbff0000000000000, 0x6e4b0a41ffffffff});
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env.ticks_left = 2;
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jit.Run();
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REQUIRE(jit.GetVector(0) == Vector{0x7fc00000'09503366, 0x6e4b0a41'7fd84a37});
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REQUIRE(jit.GetVector(2) == Vector{0x7fc0000009503366, 0x6e4b0a41ffffffff});
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}
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TEST_CASE("A64: 128-bit exclusive read/write", "[a64]") {
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TEST_CASE("A64: 128-bit exclusive read/write", "[a64]") {
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A64TestEnv env;
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A64TestEnv env;
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ExclusiveMonitor monitor{1};
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ExclusiveMonitor monitor{1};
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