asimd_*: Standardize order of n and m to reduce confusion
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4b8a781c04
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896cb46c89
2 changed files with 13 additions and 13 deletions
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@ -167,8 +167,8 @@ bool AbsoluteDifference(ArmTranslatorVisitor& v, bool U, bool D, size_t sz, size
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const auto reg_m = v.ir.GetVector(m);
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const auto reg_n = v.ir.GetVector(n);
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const auto result = [&] {
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const auto absdiff = U ? v.ir.VectorUnsignedAbsoluteDifference(esize, reg_m, reg_n)
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: v.ir.VectorSignedAbsoluteDifference(esize, reg_m, reg_n);
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const auto absdiff = U ? v.ir.VectorUnsignedAbsoluteDifference(esize, reg_n, reg_m)
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: v.ir.VectorSignedAbsoluteDifference(esize, reg_n, reg_m);
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if (accumulate == AccumulateBehavior::Accumulate) {
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const auto reg_d = v.ir.GetVector(d);
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@ -436,7 +436,7 @@ bool ArmTranslatorVisitor::asimd_VADD_int(bool D, size_t sz, size_t Vn, size_t V
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const auto reg_m = ir.GetVector(m);
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const auto reg_n = ir.GetVector(n);
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const auto result = ir.VectorAdd(esize, reg_m, reg_n);
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const auto result = ir.VectorAdd(esize, reg_n, reg_m);
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ir.SetVector(d, result);
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return true;
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@ -535,11 +535,11 @@ bool ArmTranslatorVisitor::asimd_VMAX(bool U, bool D, size_t sz, size_t Vn, size
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const auto reg_n = ir.GetVector(n);
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const auto result = [&] {
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if (op) {
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return U ? ir.VectorMinUnsigned(esize, reg_m, reg_n)
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: ir.VectorMinSigned(esize, reg_m, reg_n);
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return U ? ir.VectorMinUnsigned(esize, reg_n, reg_m)
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: ir.VectorMinSigned(esize, reg_n, reg_m);
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} else {
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return U ? ir.VectorMaxUnsigned(esize, reg_m, reg_n)
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: ir.VectorMaxSigned(esize, reg_m, reg_n);
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return U ? ir.VectorMaxUnsigned(esize, reg_n, reg_m)
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: ir.VectorMaxSigned(esize, reg_n, reg_m);
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}
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}();
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@ -591,7 +591,7 @@ bool ArmTranslatorVisitor::asimd_VMLA(bool op, bool D, size_t sz, size_t Vn, siz
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const auto reg_n = ir.GetVector(n);
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const auto reg_m = ir.GetVector(m);
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const auto reg_d = ir.GetVector(d);
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const auto multiply = ir.VectorMultiply(esize, reg_m, reg_n);
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const auto multiply = ir.VectorMultiply(esize, reg_n, reg_m);
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const auto result = op ? ir.VectorSub(esize, reg_d, multiply)
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: ir.VectorAdd(esize, reg_d, multiply);
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@ -615,8 +615,8 @@ bool ArmTranslatorVisitor::asimd_VMUL(bool P, bool D, size_t sz, size_t Vn, size
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const auto reg_n = ir.GetVector(n);
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const auto reg_m = ir.GetVector(m);
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const auto result = P ? ir.VectorPolynomialMultiply(reg_m, reg_n)
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: ir.VectorMultiply(esize, reg_m, reg_n);
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const auto result = P ? ir.VectorPolynomialMultiply(reg_n, reg_m)
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: ir.VectorMultiply(esize, reg_n, reg_m);
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ir.SetVector(d, result);
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return true;
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@ -829,8 +829,8 @@ bool ArmTranslatorVisitor::asimd_VMULL(bool U, bool D, size_t sz, size_t Vn, siz
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const auto reg_n = ir.GetVector(n);
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const auto reg_m = ir.GetVector(m);
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const auto result = P ? ir.VectorPolynomialMultiplyLong(esize, reg_m, reg_n)
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: ir.VectorMultiply(2 * esize, extend_reg(reg_m), extend_reg(reg_n));
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const auto result = P ? ir.VectorPolynomialMultiplyLong(esize, reg_n, reg_m)
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: ir.VectorMultiply(2 * esize, extend_reg(reg_n), extend_reg(reg_m));
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ir.SetVector(d, result);
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return true;
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@ -187,7 +187,7 @@ bool ArmTranslatorVisitor::asimd_VQDMULL_scalar(bool D, size_t sz, size_t Vn, si
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const auto scalar = ir.VectorGetElement(esize, ir.GetVector(m), index);
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const auto reg_n = ir.GetVector(n);
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const auto reg_m = ir.VectorBroadcast(esize, scalar);
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const auto result = ir.VectorSignedSaturatedDoublingMultiplyLong(esize, reg_m, reg_n);
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const auto result = ir.VectorSignedSaturatedDoublingMultiplyLong(esize, reg_n, reg_m);
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ir.SetVector(d, result);
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return true;
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