thumb32: Implement SMLSD{X}
This commit is contained in:
parent
ef3b77f8ae
commit
8a22bdff43
3 changed files with 29 additions and 1 deletions
|
@ -271,7 +271,7 @@ INST(thumb32_SMLAD, "SMLAD", "111110110010nnnnaaaadd
|
||||||
//INST(thumb32_SMULWY, "SMULWY", "111110110011----1111----000-----")
|
//INST(thumb32_SMULWY, "SMULWY", "111110110011----1111----000-----")
|
||||||
//INST(thumb32_SMLAWY, "SMLAWY", "111110110011------------000-----")
|
//INST(thumb32_SMLAWY, "SMLAWY", "111110110011------------000-----")
|
||||||
INST(thumb32_SMUSD, "SMUSD", "111110110100nnnn1111dddd000Mmmmm")
|
INST(thumb32_SMUSD, "SMUSD", "111110110100nnnn1111dddd000Mmmmm")
|
||||||
//INST(thumb32_SMLSD, "SMLSD", "111110110100------------000-----")
|
INST(thumb32_SMLSD, "SMLSD", "111110110100nnnnaaaadddd000Xmmmm")
|
||||||
INST(thumb32_SMMUL, "SMMUL", "111110110101nnnn1111dddd000Rmmmm")
|
INST(thumb32_SMMUL, "SMMUL", "111110110101nnnn1111dddd000Rmmmm")
|
||||||
INST(thumb32_SMMLA, "SMMLA", "111110110101nnnnaaaadddd000Rmmmm")
|
INST(thumb32_SMMLA, "SMMLA", "111110110101nnnnaaaadddd000Rmmmm")
|
||||||
INST(thumb32_SMMLS, "SMMLS", "111110110110nnnnaaaadddd000Rmmmm")
|
INST(thumb32_SMMLS, "SMMLS", "111110110110nnnnaaaadddd000Rmmmm")
|
||||||
|
|
|
@ -77,6 +77,33 @@ bool ThumbTranslatorVisitor::thumb32_SMLAD(Reg n, Reg a, Reg d, bool X, Reg m) {
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
bool ThumbTranslatorVisitor::thumb32_SMLSD(Reg n, Reg a, Reg d, bool X, Reg m) {
|
||||||
|
if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) {
|
||||||
|
return UnpredictableInstruction();
|
||||||
|
}
|
||||||
|
|
||||||
|
const IR::U32 n32 = ir.GetRegister(n);
|
||||||
|
const IR::U32 m32 = ir.GetRegister(m);
|
||||||
|
const IR::U32 n_lo = ir.SignExtendHalfToWord(ir.LeastSignificantHalf(n32));
|
||||||
|
const IR::U32 n_hi = ir.ArithmeticShiftRight(n32, ir.Imm8(16), ir.Imm1(0)).result;
|
||||||
|
|
||||||
|
IR::U32 m_lo = ir.SignExtendHalfToWord(ir.LeastSignificantHalf(m32));
|
||||||
|
IR::U32 m_hi = ir.ArithmeticShiftRight(m32, ir.Imm8(16), ir.Imm1(0)).result;
|
||||||
|
if (X) {
|
||||||
|
std::swap(m_lo, m_hi);
|
||||||
|
}
|
||||||
|
|
||||||
|
const IR::U32 product_lo = ir.Mul(n_lo, m_lo);
|
||||||
|
const IR::U32 product_hi = ir.Mul(n_hi, m_hi);
|
||||||
|
const IR::U32 addend = ir.GetRegister(a);
|
||||||
|
const IR::U32 product = ir.Sub(product_lo, product_hi);
|
||||||
|
auto result_overflow = ir.AddWithCarry(product, addend, ir.Imm1(0));
|
||||||
|
|
||||||
|
ir.SetRegister(d, result_overflow.result);
|
||||||
|
ir.OrQFlag(result_overflow.overflow);
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
bool ThumbTranslatorVisitor::thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m) {
|
bool ThumbTranslatorVisitor::thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m) {
|
||||||
if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) {
|
if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) {
|
||||||
return UnpredictableInstruction();
|
return UnpredictableInstruction();
|
||||||
|
|
|
@ -134,6 +134,7 @@ struct ThumbTranslatorVisitor final {
|
||||||
bool thumb32_MUL(Reg n, Reg d, Reg m);
|
bool thumb32_MUL(Reg n, Reg d, Reg m);
|
||||||
bool thumb32_SMLAD(Reg n, Reg a, Reg d, bool X, Reg m);
|
bool thumb32_SMLAD(Reg n, Reg a, Reg d, bool X, Reg m);
|
||||||
bool thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m);
|
bool thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m);
|
||||||
|
bool thumb32_SMLSD(Reg n, Reg a, Reg d, bool X, Reg m);
|
||||||
bool thumb32_SMMLA(Reg n, Reg a, Reg d, bool R, Reg m);
|
bool thumb32_SMMLA(Reg n, Reg a, Reg d, bool R, Reg m);
|
||||||
bool thumb32_SMMLS(Reg n, Reg a, Reg d, bool R, Reg m);
|
bool thumb32_SMMLS(Reg n, Reg a, Reg d, bool R, Reg m);
|
||||||
bool thumb32_SMMUL(Reg n, Reg d, bool R, Reg m);
|
bool thumb32_SMMUL(Reg n, Reg d, bool R, Reg m);
|
||||||
|
|
Loading…
Reference in a new issue