Merge pull request #568 from bunnei/hook-isb-a32
A32: Add hook_isb option.
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commit
8c09da666a
2 changed files with 12 additions and 3 deletions
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@ -90,6 +90,8 @@ struct UserCallbacks {
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virtual void ExceptionRaised(VAddr pc, Exception exception) = 0;
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virtual void ExceptionRaised(VAddr pc, Exception exception) = 0;
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virtual void InstructionSynchronizationBarrierRaised() {}
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// Timing-related callbacks
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// Timing-related callbacks
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// ticks ticks have passed
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// ticks ticks have passed
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virtual void AddTicks(std::uint64_t ticks) = 0;
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virtual void AddTicks(std::uint64_t ticks) = 0;
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@ -164,6 +166,11 @@ struct UserConfig {
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// Coprocessors
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// Coprocessors
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std::array<std::shared_ptr<Coprocessor>, 16> coprocessors{};
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std::array<std::shared_ptr<Coprocessor>, 16> coprocessors{};
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/// When set to true, UserCallbacks::InstructionSynchronizationBarrierRaised will be
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/// called when an ISB instruction is executed.
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/// When set to false, ISB will be treated as a NOP instruction.
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bool hook_isb = false;
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/// Hint instructions would cause ExceptionRaised to be called with the appropriate
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/// Hint instructions would cause ExceptionRaised to be called with the appropriate
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/// argument.
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/// argument.
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bool hook_hint_instructions = false;
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bool hook_hint_instructions = false;
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@ -720,10 +720,12 @@ void A32EmitX64::EmitA32DataMemoryBarrier(A32EmitContext&, IR::Inst*) {
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}
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}
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void A32EmitX64::EmitA32InstructionSynchronizationBarrier(A32EmitContext& ctx, IR::Inst*) {
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void A32EmitX64::EmitA32InstructionSynchronizationBarrier(A32EmitContext& ctx, IR::Inst*) {
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ctx.reg_alloc.HostCall(nullptr);
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if (!conf.hook_isb) {
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return;
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}
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code.mov(code.ABI_PARAM1, reinterpret_cast<u64>(jit_interface));
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ctx.reg_alloc.HostCall(nullptr);
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code.CallLambda([](A32::Jit* jit) { jit->ClearCache(); });
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Devirtualize<&A32::UserCallbacks::InstructionSynchronizationBarrierRaised>(conf.callbacks).EmitCall(code);
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}
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}
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void A32EmitX64::EmitA32BXWritePC(A32EmitContext& ctx, IR::Inst* inst) {
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void A32EmitX64::EmitA32BXWritePC(A32EmitContext& ctx, IR::Inst* inst) {
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