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dissassembler_arm: Support BKPT, QASX, QSAX, UQASX, UQSAX

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This commit is contained in:
MerryMage 2016-12-15 20:16:08 +00:00
parent 34e19f135c
commit 8d5522f4a0
1 changed files with 13 additions and 5 deletions
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18
src/frontend/disassembler/disassembler_arm.cpp
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@ -283,7 +283,7 @@ public:
// Exception generation instructions // Exception generation instructions
std::string arm_BKPT(Cond cond, Imm12 imm12, Imm4 imm4) { std::string arm_BKPT(Cond cond, Imm12 imm12, Imm4 imm4) {
return fmt::format("bkpt #{}", imm12 << 4 | imm4); return fmt::format("bkpt{} #{}", CondToString(cond), imm12 << 4 | imm4);
} }
std::string arm_SVC(Cond cond, Imm24 imm24) { std::string arm_SVC(Cond cond, Imm24 imm24) {
return fmt::format("svc{} #{}", CondToString(cond), imm24); return fmt::format("svc{} #{}", CondToString(cond), imm24);
@ -717,8 +717,12 @@ public:
std::string arm_QADD16(Cond cond, Reg n, Reg d, Reg m) { std::string arm_QADD16(Cond cond, Reg n, Reg d, Reg m) {
return fmt::format("qadd16{} {}, {}, {}", CondToString(cond), d, n, m); return fmt::format("qadd16{} {}, {}, {}", CondToString(cond), d, n, m);
} }
std::string arm_QASX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } std::string arm_QASX(Cond cond, Reg n, Reg d, Reg m) {
std::string arm_QSAX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } return fmt::format("qasx{} {}, {}, {}", CondToString(cond), d, n, m);
}
std::string arm_QSAX(Cond cond, Reg n, Reg d, Reg m) {
return fmt::format("qsax{} {}, {}, {}", CondToString(cond), d, n, m);
}
std::string arm_QSUB8(Cond cond, Reg n, Reg d, Reg m) { std::string arm_QSUB8(Cond cond, Reg n, Reg d, Reg m) {
return fmt::format("qsub8{} {}, {}, {}", CondToString(cond), d, n, m); return fmt::format("qsub8{} {}, {}, {}", CondToString(cond), d, n, m);
} }
@ -731,8 +735,12 @@ public:
std::string arm_UQADD16(Cond cond, Reg n, Reg d, Reg m) { std::string arm_UQADD16(Cond cond, Reg n, Reg d, Reg m) {
return fmt::format("uqadd16{} {}, {}, {}", CondToString(cond), d, n, m); return fmt::format("uqadd16{} {}, {}, {}", CondToString(cond), d, n, m);
} }
std::string arm_UQASX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } std::string arm_UQASX(Cond cond, Reg n, Reg d, Reg m) {
std::string arm_UQSAX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } return fmt::format("uqasx{} {}, {}, {}", CondToString(cond), d, n, m);
}
std::string arm_UQSAX(Cond cond, Reg n, Reg d, Reg m) {
return fmt::format("uqsax{} {}, {}, {}", CondToString(cond), d, n, m);
}
std::string arm_UQSUB8(Cond cond, Reg n, Reg d, Reg m) { std::string arm_UQSUB8(Cond cond, Reg n, Reg d, Reg m) {
return fmt::format("uqsub8{} {}, {}, {}", CondToString(cond), d, n, m); return fmt::format("uqsub8{} {}, {}, {}", CondToString(cond), d, n, m);
} }