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emit_x64_vector: packusdw is SSE4.1

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This commit is contained in:
MerryMage 2018-08-10 10:43:11 +01:00
parent 1ef388d1cd
commit 8fdba189cb
1 changed files with 12 additions and 5 deletions
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17
src/backend_x64/emit_x64_vector.cpp
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@ -1578,14 +1578,20 @@ void EmitX64::EmitVectorNarrow16(EmitContext& ctx, IR::Inst* inst) {
void EmitX64::EmitVectorNarrow32(EmitContext& ctx, IR::Inst* inst) { void EmitX64::EmitVectorNarrow32(EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto args = ctx.reg_alloc.GetArgumentInfo(inst);
Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]); const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
Xbyak::Xmm zeros = ctx.reg_alloc.ScratchXmm(); const Xbyak::Xmm zeros = ctx.reg_alloc.ScratchXmm();
// TODO: AVX512F implementation // TODO: AVX512F implementation
code.pxor(zeros, zeros); code.pxor(zeros, zeros);
code.pand(a, code.MConst(xword, 0x0000FFFF0000FFFF, 0x0000FFFF0000FFFF)); if (code.DoesCpuSupport(Xbyak::util::Cpu::tSSE41)) {
code.packusdw(a, zeros); code.pand(a, code.MConst(xword, 0x0000FFFF0000FFFF, 0x0000FFFF0000FFFF));
code.packusdw(a, zeros);
} else {
code.pslld(a, 16);
code.psrad(a, 16);
code.packssdw(a, zeros);
}
ctx.reg_alloc.DefineValue(inst, a); ctx.reg_alloc.DefineValue(inst, a);
} }
@ -2523,7 +2529,8 @@ static void EmitVectorSignedSaturatedNarrowToUnsigned(size_t original_esize, Blo
code.punpcklbw(reconstructed, zero); code.punpcklbw(reconstructed, zero);
break; break;
case 32: case 32:
code.packusdw(dest, dest); ASSERT(code.DoesCpuSupport(Xbyak::util::Cpu::tSSE41));
code.packusdw(dest, dest); // SSE4.1
code.movdqa(reconstructed, dest); code.movdqa(reconstructed, dest);
code.punpcklwd(reconstructed, zero); code.punpcklwd(reconstructed, zero);
break; break;