thumb32: Implement STMIA/STMEA

This commit is contained in:
Lioncash 2021-03-12 18:29:55 -05:00
parent 543ba4e61f
commit 91c4d59da9
4 changed files with 45 additions and 1 deletions

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@ -163,6 +163,7 @@ if ("A32" IN_LIST DYNARMIC_FRONTENDS)
frontend/A32/translate/impl/thumb32_data_processing_shifted_register.cpp frontend/A32/translate/impl/thumb32_data_processing_shifted_register.cpp
frontend/A32/translate/impl/thumb32_load_byte.cpp frontend/A32/translate/impl/thumb32_load_byte.cpp
frontend/A32/translate/impl/thumb32_load_halfword.cpp frontend/A32/translate/impl/thumb32_load_halfword.cpp
frontend/A32/translate/impl/thumb32_load_store_multiple.cpp
frontend/A32/translate/impl/thumb32_load_word.cpp frontend/A32/translate/impl/thumb32_load_word.cpp
frontend/A32/translate/impl/thumb32_long_multiply.cpp frontend/A32/translate/impl/thumb32_long_multiply.cpp
frontend/A32/translate/impl/thumb32_misc.cpp frontend/A32/translate/impl/thumb32_misc.cpp

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@ -1,7 +1,7 @@
// Load/Store Multiple // Load/Store Multiple
//INST(thumb32_SRS_1, "SRS", "1110100000-0--------------------") //INST(thumb32_SRS_1, "SRS", "1110100000-0--------------------")
//INST(thumb32_RFE_2, "RFE", "1110100000-1--------------------") //INST(thumb32_RFE_2, "RFE", "1110100000-1--------------------")
//INST(thumb32_STMIA, "STMIA/STMEA", "1110100010-0--------------------") INST(thumb32_STMIA, "STMIA/STMEA", "1110100010W0nnnn0iiiiiiiiiiiiiii")
//INST(thumb32_POP, "POP", "1110100010111101----------------") //INST(thumb32_POP, "POP", "1110100010111101----------------")
//INST(thumb32_LDMIA, "LDMIA/LDMFD", "1110100010-1--------------------") //INST(thumb32_LDMIA, "LDMIA/LDMFD", "1110100010-1--------------------")
//INST(thumb32_PUSH, "PUSH", "1110100100101101----------------") //INST(thumb32_PUSH, "PUSH", "1110100100101101----------------")

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@ -0,0 +1,40 @@
/* This file is part of the dynarmic project.
* Copyright (c) 2021 MerryMage
* SPDX-License-Identifier: 0BSD
*/
#include "common/bit_util.h"
#include "frontend/A32/translate/impl/translate_thumb.h"
namespace Dynarmic::A32 {
bool ThumbTranslatorVisitor::thumb32_STMIA(bool W, Reg n, Imm<15> reg_list) {
const auto regs_imm = reg_list.ZeroExtend();
const auto num_regs = static_cast<u32>(Common::BitCount(regs_imm));
if (n == Reg::PC || num_regs < 2) {
return UnpredictableInstruction();
}
if (W && Common::Bit(static_cast<size_t>(n), regs_imm)) {
return UnpredictableInstruction();
}
if (reg_list.Bit<13>()) {
return UnpredictableInstruction();
}
IR::U32 address = ir.GetRegister(n);
for (size_t i = 0; i < 15; i++) {
if (Common::Bit(i, regs_imm)) {
ir.WriteMemory32(address, ir.GetRegister(static_cast<Reg>(i)));
}
address = ir.Add(address, ir.Imm32(4));
}
if (W) {
ir.SetRegister(n, address);
}
return true;
}
} // namespace Dynarmic::A32

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@ -171,6 +171,9 @@ struct ThumbTranslatorVisitor final {
bool thumb16_B_t1(Cond cond, Imm<8> imm8); bool thumb16_B_t1(Cond cond, Imm<8> imm8);
bool thumb16_B_t2(Imm<11> imm11); bool thumb16_B_t2(Imm<11> imm11);
// thumb32 load/store multiple instructions
bool thumb32_STMIA(bool W, Reg n, Imm<15> reg_list);
// thumb32 data processing (shifted register) instructions // thumb32 data processing (shifted register) instructions
bool thumb32_TST_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m); bool thumb32_TST_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m);
bool thumb32_AND_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m); bool thumb32_AND_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);