arm64/a32_jitstate: Adjust structure
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726e116e28
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950400fb6b
2 changed files with 5 additions and 5 deletions
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@ -16,9 +16,9 @@ namespace Dynarmic::Backend::Arm64 {
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struct A32JitState {
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struct A32JitState {
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u32 cpsr_nzcv = 0;
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u32 cpsr_nzcv = 0;
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u32 cpsr_ge = 0;
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u32 cpsr_jaifm = 0;
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u32 cpsr_q = 0;
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u32 cpsr_q = 0;
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u32 cpsr_jaifm = 0;
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u32 cpsr_ge = 0;
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std::array<u32, 16> regs{};
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std::array<u32, 16> regs{};
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@ -224,10 +224,10 @@ void EmitIR<IR::Opcode::A32GetCpsr>(oaknut::CodeGenerator& code, EmitContext& ct
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auto Wcpsr = ctx.reg_alloc.WriteW(inst);
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auto Wcpsr = ctx.reg_alloc.WriteW(inst);
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RegAlloc::Realize(Wcpsr);
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RegAlloc::Realize(Wcpsr);
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static_assert(offsetof(A32JitState, cpsr_jaifm) + sizeof(u32) == offsetof(A32JitState, cpsr_q));
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static_assert(offsetof(A32JitState, cpsr_nzcv) + sizeof(u32) == offsetof(A32JitState, cpsr_q));
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code.LDR(Wcpsr, Xstate, offsetof(A32JitState, cpsr_nzcv));
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code.LDP(Wscratch0, Wscratch1, Xstate, offsetof(A32JitState, cpsr_nzcv));
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code.LDP(Wscratch0, Wscratch1, Xstate, offsetof(A32JitState, cpsr_jaifm));
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code.LDR(Wcpsr, Xstate, offsetof(A32JitState, cpsr_jaifm));
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code.ORR(Wcpsr, Wcpsr, Wscratch0);
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code.ORR(Wcpsr, Wcpsr, Wscratch0);
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code.ORR(Wcpsr, Wcpsr, Wscratch1);
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code.ORR(Wcpsr, Wcpsr, Wscratch1);
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