IR: Implement FPVectorAdd
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4 changed files with 22 additions and 0 deletions
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@ -25,6 +25,14 @@ static void EmitVectorOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* i
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ctx.reg_alloc.DefineValue(inst, xmm_a);
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}
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void EmitX64::EmitFPVectorAdd32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation(code, ctx, inst, &Xbyak::CodeGenerator::addps);
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}
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void EmitX64::EmitFPVectorAdd64(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation(code, ctx, inst, &Xbyak::CodeGenerator::addpd);
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}
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void EmitX64::EmitFPVectorSub32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation(code, ctx, inst, &Xbyak::CodeGenerator::subps);
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}
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@ -1154,6 +1154,17 @@ U64 IREmitter::FPU32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_con
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return Inst<U64>(Opcode::FPU32ToDouble, a, Imm1(round_to_nearest));
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}
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U128 IREmitter::FPVectorAdd(size_t esize, const U128& a, const U128& b) {
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switch (esize) {
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case 32:
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return Inst<U128>(Opcode::FPVectorAdd32, a, b);
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case 64:
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return Inst<U128>(Opcode::FPVectorAdd64, a, b);
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}
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UNREACHABLE();
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return {};
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}
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U128 IREmitter::FPVectorSub(size_t esize, const U128& a, const U128& b) {
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switch (esize) {
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case 32:
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@ -248,6 +248,7 @@ public:
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U64 FPS32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_controlled);
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U64 FPU32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_controlled);
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U128 FPVectorAdd(size_t esize, const U128& a, const U128& b);
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U128 FPVectorSub(size_t esize, const U128& a, const U128& b);
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void Breakpoint();
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@ -294,6 +294,8 @@ OPCODE(FPU32ToDouble, T::U64, T::U32, T::U1
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OPCODE(FPS32ToDouble, T::U64, T::U32, T::U1 )
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// Floating-point vector instructions
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OPCODE(FPVectorAdd32, T::U128, T::U128, T::U128 )
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OPCODE(FPVectorAdd64, T::U128, T::U128, T::U128 )
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OPCODE(FPVectorSub32, T::U128, T::U128, T::U128 )
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OPCODE(FPVectorSub64, T::U128, T::U128, T::U128 )
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