mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

backend/arm64: Implement LeastSignificantHalf

Browse source
This commit is contained in:
Merry 2022-07-22 23:59:31 +01:00 committed by merry
parent 163ed9b185
commit a33d186fea
1 changed files with 7 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
View file

@ -84,10 +84,13 @@ void EmitIR<IR::Opcode::LeastSignificantWord>(oaknut::CodeGenerator& code, EmitC
template<> template<>
void EmitIR<IR::Opcode::LeastSignificantHalf>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::LeastSignificantHalf>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; auto args = ctx.reg_alloc.GetArgumentInfo(inst);
(void)ctx;
(void)inst; auto Wresult = ctx.reg_alloc.WriteW(inst);
ASSERT_FALSE("Unimplemented"); auto Woperand = ctx.reg_alloc.ReadW(args[0]);
RegAlloc::Realize(Wresult, Woperand);
code.UXTH(Wresult, Woperand); // TODO: Zext elimination
} }
template<> template<>