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data_processsing_conditional_select: Implement CSINC, CSINV and CSNEG

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Lioncash 2018-01-21 14:24:44 -05:00 committed by MerryMage
parent b08be71775
commit a8a65beb2b
2 changed files with 39 additions and 3 deletions
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6
src/frontend/A64/decoder/a64.inc
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@ -332,9 +332,9 @@ INST(SBCS, "SBCS", "z1111
// Data Processing - Register - Conditional select // Data Processing - Register - Conditional select
INST(CSEL, "CSEL", "z0011010100mmmmmcccc00nnnnnddddd") INST(CSEL, "CSEL", "z0011010100mmmmmcccc00nnnnnddddd")
//INST(CSINC, "CSINC", "z0011010100mmmmmcccc01nnnnnddddd") INST(CSINC, "CSINC", "z0011010100mmmmmcccc01nnnnnddddd")
//INST(CSINV, "CSINV", "z1011010100mmmmmcccc00nnnnnddddd") INST(CSINV, "CSINV", "z1011010100mmmmmcccc00nnnnnddddd")
//INST(CSNEG, "CSNEG", "z1011010100mmmmmcccc01nnnnnddddd") INST(CSNEG, "CSNEG", "z1011010100mmmmmcccc01nnnnnddddd")
// Data Processing - Register - 3 source // Data Processing - Register - 3 source
//INST(MADD, "MADD", "z0011011000mmmmm0aaaaannnnnddddd") //INST(MADD, "MADD", "z0011011000mmmmm0aaaaannnnnddddd")

36
src/frontend/A64/translate/impl/data_processing_conditional_select.cpp
View file

@ -22,5 +22,41 @@ bool TranslatorVisitor::CSEL(bool sf, Reg Rm, Cond cond, Reg Rn, Reg Rd) {
return true; return true;
} }
bool TranslatorVisitor::CSINC(bool sf, Reg Rm, Cond cond, Reg Rn, Reg Rd) {
const size_t datasize = sf ? 64 : 32;
const IR::U32U64 operand1 = X(datasize, Rn);
const IR::U32U64 operand2 = X(datasize, Rm);
const IR::U32U64 result = ir.ConditionalSelect(cond, operand1, ir.Add(operand2, I(datasize, 1)));
X(datasize, Rd, result);
return true;
}
bool TranslatorVisitor::CSINV(bool sf, Reg Rm, Cond cond, Reg Rn, Reg Rd) {
const size_t datasize = sf ? 64 : 32;
const IR::U32U64 operand1 = X(datasize, Rn);
const IR::U32U64 operand2 = X(datasize, Rm);
const IR::U32U64 result = ir.ConditionalSelect(cond, operand1, ir.Not(operand2));
X(datasize, Rd, result);
return true;
}
bool TranslatorVisitor::CSNEG(bool sf, Reg Rm, Cond cond, Reg Rn, Reg Rd) {
const size_t datasize = sf ? 64 : 32;
const IR::U32U64 operand1 = X(datasize, Rn);
const IR::U32U64 operand2 = X(datasize, Rm);
const IR::U32U64 result = ir.ConditionalSelect(cond, operand1, ir.Add(ir.Not(operand2), I(datasize, 1)));
X(datasize, Rd, result);
return true;
}
} // namespace A64 } // namespace A64
} // namespace Dynarmic } // namespace Dynarmic