common/fp/op: Add half-precision specialization for FPRecipEstimate
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5d5c9f149f
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1 changed files with 7 additions and 6 deletions
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@ -31,12 +31,12 @@ FPT FPRecipEstimate(FPT op, FPCR fpcr, FPSR& fpsr) {
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}
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}
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if (type == FPType::Infinity) {
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if (type == FPType::Infinity) {
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return FPInfo<FPT>::Zero(sign);
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return FPT(FPInfo<FPT>::Zero(sign));
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}
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}
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if (type == FPType::Zero) {
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if (type == FPType::Zero) {
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FPProcessException(FPExc::DivideByZero, fpcr, fpsr);
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FPProcessException(FPExc::DivideByZero, fpcr, fpsr);
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return FPInfo<FPT>::Infinity(sign);
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return FPT(FPInfo<FPT>::Infinity(sign));
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}
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}
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if (value.exponent < FPInfo<FPT>::exponent_min - 2) {
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if (value.exponent < FPInfo<FPT>::exponent_min - 2) {
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@ -58,13 +58,13 @@ FPT FPRecipEstimate(FPT op, FPCR fpcr, FPSR& fpsr) {
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FPProcessException(FPExc::Overflow, fpcr, fpsr);
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FPProcessException(FPExc::Overflow, fpcr, fpsr);
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FPProcessException(FPExc::Inexact, fpcr, fpsr);
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FPProcessException(FPExc::Inexact, fpcr, fpsr);
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return overflow_to_inf ? FPInfo<FPT>::Infinity(sign) : FPInfo<FPT>::MaxNormal(sign);
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return overflow_to_inf ? FPT(FPInfo<FPT>::Infinity(sign)) : FPT(FPInfo<FPT>::MaxNormal(sign));
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}
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}
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if ((fpcr.FZ() && !std::is_same_v<FPT, u16>) || (fpcr.FZ16() && std::is_same_v<FPT, u16>)) {
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if ((fpcr.FZ() && !std::is_same_v<FPT, u16>) || (fpcr.FZ16() && std::is_same_v<FPT, u16>)) {
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if (value.exponent >= -FPInfo<FPT>::exponent_min) {
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if (value.exponent >= -FPInfo<FPT>::exponent_min) {
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fpsr.UFC(true);
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fpsr.UFC(true);
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return FPInfo<FPT>::Zero(sign);
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return FPT(FPInfo<FPT>::Zero(sign));
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}
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}
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}
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}
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@ -87,12 +87,13 @@ FPT FPRecipEstimate(FPT op, FPCR fpcr, FPSR& fpsr) {
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}
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}
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}
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}
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const FPT bits_sign = FPInfo<FPT>::Zero(sign);
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const FPT bits_sign = FPT(FPInfo<FPT>::Zero(sign));
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const FPT bits_exponent = static_cast<FPT>(result_exponent + FPInfo<FPT>::exponent_bias);
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const FPT bits_exponent = static_cast<FPT>(result_exponent + FPInfo<FPT>::exponent_bias);
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const FPT bits_mantissa = static_cast<FPT>(estimate);
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const FPT bits_mantissa = static_cast<FPT>(estimate);
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return (bits_exponent << FPInfo<FPT>::explicit_mantissa_width) | (bits_mantissa & FPInfo<FPT>::mantissa_mask) | bits_sign;
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return FPT((bits_exponent << FPInfo<FPT>::explicit_mantissa_width) | (bits_mantissa & FPInfo<FPT>::mantissa_mask) | bits_sign);
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}
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}
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template u16 FPRecipEstimate<u16>(u16 op, FPCR fpcr, FPSR& fpsr);
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template u32 FPRecipEstimate<u32>(u32 op, FPCR fpcr, FPSR& fpsr);
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template u32 FPRecipEstimate<u32>(u32 op, FPCR fpcr, FPSR& fpsr);
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template u64 FPRecipEstimate<u64>(u64 op, FPCR fpcr, FPSR& fpsr);
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template u64 FPRecipEstimate<u64>(u64 op, FPCR fpcr, FPSR& fpsr);
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