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A64: Implement PMUL

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Lioncash 2018-07-26 04:21:50 -04:00 committed by MerryMage
parent affa312d1d
commit b48fb8ca6b
2 changed files with 16 additions and 1 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -760,7 +760,7 @@ INST(UABA, "UABA", "0Q101
INST(SUB_2, "SUB (vector)", "0Q101110zz1mmmmm100001nnnnnddddd")
INST(CMEQ_reg_2, "CMEQ (register)", "0Q101110zz1mmmmm100011nnnnnddddd")
INST(MLS_vec, "MLS (vector)", "0Q101110zz1mmmmm100101nnnnnddddd")
//INST(PMUL, "PMUL", "0Q101110zz1mmmmm100111nnnnnddddd")
INST(PMUL, "PMUL", "0Q101110zz1mmmmm100111nnnnnddddd")
//INST(UMAXP, "UMAXP", "0Q101110zz1mmmmm101001nnnnnddddd")
//INST(UMINP, "UMINP", "0Q101110zz1mmmmm101011nnnnnddddd")
//INST(SQRDMULH_vec_2, "SQRDMULH (vector)", "0Q101110zz1mmmmm101101nnnnnddddd")

15
src/frontend/A64/translate/impl/simd_three_same.cpp
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@ -708,6 +708,21 @@ bool TranslatorVisitor::ORN_asimd(bool Q, Vec Vm, Vec Vn, Vec Vd) {
return true;
}
bool TranslatorVisitor::PMUL(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size != 0b00) {
return ReservedValue();
}
const size_t datasize = Q ? 128 : 64;
const IR::U128 operand1 = V(datasize, Vn);
const IR::U128 operand2 = V(datasize, Vm);
const IR::U128 result = ir.VectorPolynomialMultiply(operand1, operand2);
V(datasize, Vd, result);
return true;
}
bool TranslatorVisitor::SUB_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size == 0b11 && !Q) return ReservedValue();
const size_t esize = 8 << size.ZeroExtend<size_t>();