emit_x64_vector: AVX512 implementation of EmitVectorLogicalVShiftS16
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@ -1371,6 +1371,32 @@ void EmitX64::EmitVectorLogicalVShiftS8(EmitContext& ctx, IR::Inst* inst) {
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}
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void EmitX64::EmitVectorLogicalVShiftS16(EmitContext& ctx, IR::Inst* inst) {
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if (code.DoesCpuSupport(Xbyak::util::Cpu::tAVX512VL) && code.DoesCpuSupport(Xbyak::util::Cpu::tAVX512BW)) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm left_shift = ctx.reg_alloc.UseScratchXmm(args[1]);
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const Xbyak::Xmm right_shift = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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code.vmovdqa(tmp, code.MConst(xword, 0x00FF00FF00FF00FF, 0x00FF00FF00FF00FF));
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code.vpxor(right_shift, right_shift, right_shift);
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code.vpsubw(right_shift, right_shift, left_shift);
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code.vpsllw(xmm0, left_shift, 8);
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code.vpsraw(xmm0, xmm0, 15);
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code.vpand(right_shift, right_shift, tmp);
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code.vpand(left_shift, left_shift, tmp);
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code.vpsravw(tmp, result, right_shift);
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code.vpsllvw(result, result, left_shift);
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code.pblendvb(result, tmp);
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ctx.reg_alloc.DefineValue(inst, result);
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return;
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}
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EmitTwoArgumentFallback(code, ctx, inst, [](VectorArray<s16>& result, const VectorArray<s16>& a, const VectorArray<s16>& b) {
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std::transform(a.begin(), a.end(), b.begin(), result.begin(), LogicalVShift<s16>);
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});
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