mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

load_store_load_literal: Make variables const where applicable

Browse source
This commit is contained in:
Lioncash 2018-09-17 21:18:16 -04:00 committed by MerryMage
parent c3a3b9687e
commit b586cf3f56
1 changed files with 7 additions and 10 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

17
src/frontend/A64/translate/impl/load_store_load_literal.cpp
View file

@ -9,14 +9,13 @@
namespace Dynarmic::A64 { namespace Dynarmic::A64 {
bool TranslatorVisitor::LDR_lit_gen(bool opc_0, Imm<19> imm19, Reg Rt) { bool TranslatorVisitor::LDR_lit_gen(bool opc_0, Imm<19> imm19, Reg Rt) {
size_t size = opc_0 == 0 ? 4 : 8; const size_t size = opc_0 == 0 ? 4 : 8;
s64 offset = concatenate(imm19, Imm<2>{0}).SignExtend<s64>(); const s64 offset = concatenate(imm19, Imm<2>{0}).SignExtend<s64>();
u64 address = ir.PC() + offset; const u64 address = ir.PC() + offset;
const auto data = Mem(ir.Imm64(address), size, AccType::NORMAL);
auto data = Mem(ir.Imm64(address), size, AccType::NORMAL);
X(8 * size, Rt, data); X(8 * size, Rt, data);
return true; return true;
} }
@ -39,13 +38,11 @@ bool TranslatorVisitor::LDR_lit_fpsimd(Imm<2> opc, Imm<19> imm19, Vec Vt) {
} }
bool TranslatorVisitor::LDRSW_lit(Imm<19> imm19, Reg Rt) { bool TranslatorVisitor::LDRSW_lit(Imm<19> imm19, Reg Rt) {
s64 offset = concatenate(imm19, Imm<2>{0}).SignExtend<s64>(); const s64 offset = concatenate(imm19, Imm<2>{0}).SignExtend<s64>();
const u64 address = ir.PC() + offset;
const auto data = Mem(ir.Imm64(address), 4, AccType::NORMAL);
u64 address = ir.PC() + offset;
auto data = Mem(ir.Imm64(address), 4, AccType::NORMAL);
X(64, Rt, ir.SignExtendWordToLong(data)); X(64, Rt, ir.SignExtendWordToLong(data));
return true; return true;
} }