A64: Implement SMADDL, SMSUBL, UMADDL, and UMSUBL
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2 changed files with 48 additions and 4 deletions
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@ -339,11 +339,11 @@ INST(CSNEG, "CSNEG", "z1011
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// Data Processing - Register - 3 source
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// Data Processing - Register - 3 source
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INST(MADD, "MADD", "z0011011000mmmmm0aaaaannnnnddddd")
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INST(MADD, "MADD", "z0011011000mmmmm0aaaaannnnnddddd")
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INST(MSUB, "MSUB", "z0011011000mmmmm1aaaaannnnnddddd")
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INST(MSUB, "MSUB", "z0011011000mmmmm1aaaaannnnnddddd")
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//INST(SMADDL, "SMADDL", "10011011001mmmmm0aaaaannnnnddddd")
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INST(SMADDL, "SMADDL", "10011011001mmmmm0aaaaannnnnddddd")
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//INST(SMSUBL, "SMSUBL", "10011011001mmmmm1aaaaannnnnddddd")
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INST(SMSUBL, "SMSUBL", "10011011001mmmmm1aaaaannnnnddddd")
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//INST(SMULH, "SMULH", "10011011010mmmmm011111nnnnnddddd")
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//INST(SMULH, "SMULH", "10011011010mmmmm011111nnnnnddddd")
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//INST(UMADDL, "UMADDL", "10011011101mmmmm0aaaaannnnnddddd")
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INST(UMADDL, "UMADDL", "10011011101mmmmm0aaaaannnnnddddd")
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//INST(UMSUBL, "UMSUBL", "10011011101mmmmm1aaaaannnnnddddd")
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INST(UMSUBL, "UMSUBL", "10011011101mmmmm1aaaaannnnnddddd")
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//INST(UMULH, "UMULH", "10011011110mmmmm011111nnnnnddddd")
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//INST(UMULH, "UMULH", "10011011110mmmmm011111nnnnnddddd")
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// Data Processing - FP and SIMD - AES
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// Data Processing - FP and SIMD - AES
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@ -35,5 +35,49 @@ bool TranslatorVisitor::MSUB(bool sf, Reg Rm, Reg Ra, Reg Rn, Reg Rd) {
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return true;
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return true;
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}
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}
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bool TranslatorVisitor::SMADDL(Reg Rm, Reg Ra, Reg Rn, Reg Rd) {
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const IR::U64 a = X(64, Ra);
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const IR::U64 m = ir.SignExtendToLong(X(32, Rm));
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const IR::U64 n = ir.SignExtendToLong(X(32, Rn));
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const IR::U64 result = ir.Add(a, ir.Mul(n, m));
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X(64, Rd, result);
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return true;
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}
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bool TranslatorVisitor::SMSUBL(Reg Rm, Reg Ra, Reg Rn, Reg Rd) {
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const IR::U64 a = X(64, Ra);
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const IR::U64 m = ir.SignExtendToLong(X(32, Rm));
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const IR::U64 n = ir.SignExtendToLong(X(32, Rn));
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const IR::U64 result = ir.Sub(a, ir.Mul(n, m));
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X(64, Rd, result);
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return true;
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}
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bool TranslatorVisitor::UMADDL(Reg Rm, Reg Ra, Reg Rn, Reg Rd) {
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const IR::U64 a = X(64, Ra);
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const IR::U64 m = ir.ZeroExtendToLong(X(32, Rm));
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const IR::U64 n = ir.ZeroExtendToLong(X(32, Rn));
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const IR::U64 result = ir.Add(a, ir.Mul(n, m));
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X(64, Rd, result);
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return true;
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}
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bool TranslatorVisitor::UMSUBL(Reg Rm, Reg Ra, Reg Rn, Reg Rd) {
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const IR::U64 a = X(64, Ra);
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const IR::U64 m = ir.ZeroExtendToLong(X(32, Rm));
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const IR::U64 n = ir.ZeroExtendToLong(X(32, Rn));
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const IR::U64 result = ir.Sub(a, ir.Mul(n, m));
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X(64, Rd, result);
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return true;
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}
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} // namespace A64
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} // namespace A64
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} // namespace Dynarmic
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} // namespace Dynarmic
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