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x64/reg_alloc: More zero extension paranoia

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This commit is contained in:
Merry 2022-03-06 12:24:50 +00:00
parent 316b95bb3f
commit bcfe377aaa
1 changed files with 4 additions and 2 deletions
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6
src/dynarmic/backend/x64/reg_alloc.cpp
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@ -410,7 +410,7 @@ void RegAlloc::HostCall(IR::Inst* result_def,
for (size_t i = 0; i < args_count; i++) { for (size_t i = 0; i < args_count; i++) {
if (args[i] && !args[i]->get().IsVoid()) { if (args[i] && !args[i]->get().IsVoid()) {
UseScratch(*args[i], args_hostloc[i]); UseScratch(*args[i], args_hostloc[i]);
#if defined(__llvm__) && !defined(_WIN32)
// LLVM puts the burden of zero-extension of 8 and 16 bit values on the caller instead of the callee // LLVM puts the burden of zero-extension of 8 and 16 bit values on the caller instead of the callee
const Xbyak::Reg64 reg = HostLocToReg64(args_hostloc[i]); const Xbyak::Reg64 reg = HostLocToReg64(args_hostloc[i]);
switch (args[i]->get().GetType()) { switch (args[i]->get().GetType()) {
@ -420,10 +420,12 @@ void RegAlloc::HostCall(IR::Inst* result_def,
case IR::Type::U16: case IR::Type::U16:
code.movzx(reg.cvt32(), reg.cvt16()); code.movzx(reg.cvt32(), reg.cvt16());
break; break;
case IR::Type::U32:
code.mov(reg.cvt32(), reg.cvt32());
break;
default: default:
break; // Nothing needs to be done break; // Nothing needs to be done
} }
#endif
} }
} }