thumb32: Implement STR immediate variants
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2521314384
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bd02d9e27f
3 changed files with 59 additions and 4 deletions
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@ -134,10 +134,10 @@ INST(thumb32_STRH_imm_2, "STRH (imm)", "111110000010nnnntttt11
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INST(thumb32_STRH_imm_3, "STRH (imm)", "111110001010nnnnttttiiiiiiiiiiii")
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INST(thumb32_STRH_imm_3, "STRH (imm)", "111110001010nnnnttttiiiiiiiiiiii")
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INST(thumb32_STRHT, "STRHT", "111110000010nnnntttt1110iiiiiiii")
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INST(thumb32_STRHT, "STRHT", "111110000010nnnntttt1110iiiiiiii")
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INST(thumb32_STRH, "STRH (reg)", "111110000010nnnntttt000000iimmmm")
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INST(thumb32_STRH, "STRH (reg)", "111110000010nnnntttt000000iimmmm")
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//INST(thumb32_STR_imm_1, "STR (imm)", "111110000100--------1--1--------")
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INST(thumb32_STR_imm_1, "STR (imm)", "111110000100nnnntttt1PU1iiiiiiii")
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//INST(thumb32_STR_imm_2, "STR (imm)", "111110000100--------1100--------")
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INST(thumb32_STR_imm_2, "STR (imm)", "111110000100nnnntttt1100iiiiiiii")
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//INST(thumb32_STR_imm_3, "STR (imm)", "111110001100--------------------")
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INST(thumb32_STR_imm_3, "STR (imm)", "111110001100nnnnttttiiiiiiiiiiii")
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//INST(thumb32_STRT, "STRT", "111110000100--------1110--------")
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INST(thumb32_STRT, "STRT", "111110000100nnnntttt1110iiiiiiii")
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INST(thumb32_STR_reg, "STR (reg)", "111110000100nnnntttt000000iimmmm")
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INST(thumb32_STR_reg, "STR (reg)", "111110000100nnnntttt000000iimmmm")
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// Load Byte and Memory Hints
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// Load Byte and Memory Hints
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@ -39,6 +39,10 @@ static void StoreImmHalfFn(ThumbTranslatorVisitor& v, const IR::U32& address, co
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v.ir.WriteMemory16(address, v.ir.LeastSignificantHalf(data));
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v.ir.WriteMemory16(address, v.ir.LeastSignificantHalf(data));
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}
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}
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static void StoreImmWordFn(ThumbTranslatorVisitor& v, const IR::U32& address, const IR::U32& data) {
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v.ir.WriteMemory32(address, data);
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}
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static bool StoreImmediate(ThumbTranslatorVisitor& v, Reg n, Reg t, bool P, bool U, bool W, Imm<12> imm12,
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static bool StoreImmediate(ThumbTranslatorVisitor& v, Reg n, Reg t, bool P, bool U, bool W, Imm<12> imm12,
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StoreImmFn store_fn) {
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StoreImmFn store_fn) {
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const auto imm32 = imm12.ZeroExtend();
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const auto imm32 = imm12.ZeroExtend();
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@ -164,6 +168,53 @@ bool ThumbTranslatorVisitor::thumb32_STRH(Reg n, Reg t, Imm<2> imm2, Reg m) {
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});
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});
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}
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}
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bool ThumbTranslatorVisitor::thumb32_STR_imm_1(Reg n, Reg t, bool P, bool U, Imm<8> imm8) {
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if (n == Reg::PC) {
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return UndefinedInstruction();
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}
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if (t == Reg::PC || n == t) {
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return UnpredictableInstruction();
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}
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return StoreImmediate(*this, n, t, P, U, true, Imm<12>{imm8.ZeroExtend()}, StoreImmWordFn);
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}
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bool ThumbTranslatorVisitor::thumb32_STR_imm_2(Reg n, Reg t, Imm<8> imm8) {
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if (n == Reg::PC) {
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return UndefinedInstruction();
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}
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if (t == Reg::PC) {
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return UnpredictableInstruction();
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}
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return StoreImmediate(*this, n, t, true, false, false, Imm<12>{imm8.ZeroExtend()}, StoreImmWordFn);
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}
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bool ThumbTranslatorVisitor::thumb32_STR_imm_3(Reg n, Reg t, Imm<12> imm12) {
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if (n == Reg::PC) {
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return UndefinedInstruction();
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}
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if (t == Reg::PC) {
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return UnpredictableInstruction();
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}
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return StoreImmediate(*this, n, t, true, true, false, imm12, StoreImmWordFn);
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}
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bool ThumbTranslatorVisitor::thumb32_STRT(Reg n, Reg t, Imm<8> imm8) {
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// TODO: Add an unpredictable instruction path if this
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// is executed in hypervisor mode if we ever support
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// privileged execution levels.
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if (n == Reg::PC) {
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return UndefinedInstruction();
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}
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if (t == Reg::PC) {
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return UnpredictableInstruction();
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}
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// Treat this as a normal STR, given we don't support
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// execution levels other than EL0 currently.
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return StoreImmediate(*this, n, t, true, true, false, Imm<12>{imm8.ZeroExtend()}, StoreImmWordFn);
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}
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bool ThumbTranslatorVisitor::thumb32_STR_reg(Reg n, Reg t, Imm<2> imm2, Reg m) {
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bool ThumbTranslatorVisitor::thumb32_STR_reg(Reg n, Reg t, Imm<2> imm2, Reg m) {
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return StoreRegister(*this, n, t, imm2, m, [this](const IR::U32& offset_address, const IR::U32& data) {
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return StoreRegister(*this, n, t, imm2, m, [this](const IR::U32& offset_address, const IR::U32& data) {
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ir.WriteMemory32(offset_address, data);
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ir.WriteMemory32(offset_address, data);
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@ -253,6 +253,10 @@ struct ThumbTranslatorVisitor final {
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bool thumb32_STRH_imm_3(Reg n, Reg t, Imm<12> imm12);
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bool thumb32_STRH_imm_3(Reg n, Reg t, Imm<12> imm12);
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bool thumb32_STRHT(Reg n, Reg t, Imm<8> imm8);
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bool thumb32_STRHT(Reg n, Reg t, Imm<8> imm8);
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bool thumb32_STRH(Reg n, Reg t, Imm<2> imm2, Reg m);
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bool thumb32_STRH(Reg n, Reg t, Imm<2> imm2, Reg m);
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bool thumb32_STR_imm_1(Reg n, Reg t, bool P, bool U, Imm<8> imm8);
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bool thumb32_STR_imm_2(Reg n, Reg t, Imm<8> imm8);
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bool thumb32_STR_imm_3(Reg n, Reg t, Imm<12> imm12);
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bool thumb32_STRT(Reg n, Reg t, Imm<8> imm8);
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bool thumb32_STR_reg(Reg n, Reg t, Imm<2> imm2, Reg m);
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bool thumb32_STR_reg(Reg n, Reg t, Imm<2> imm2, Reg m);
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// thumb32 load byte and memory hints
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// thumb32 load byte and memory hints
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