emit_x64_vector_floating_point: Avoid checking inputs for NaNs for three-ops where able
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e06933f123
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1 changed files with 25 additions and 5 deletions
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@ -337,8 +337,12 @@ void EmitTwoOpVectorOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* ins
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ctx.reg_alloc.DefineValue(inst, result);
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ctx.reg_alloc.DefineValue(inst, result);
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}
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}
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enum CheckInputNaN {
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Yes, No,
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};
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template<size_t fsize, template<typename> class Indexer, typename Function>
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template<size_t fsize, template<typename> class Indexer, typename Function>
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void EmitThreeOpVectorOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn, typename NaNHandler<fsize, Indexer, 3>::function_type nan_handler = NaNHandler<fsize, Indexer, 3>::GetDefault()) {
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void EmitThreeOpVectorOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn, CheckInputNaN check_input_nan = CheckInputNaN::No, typename NaNHandler<fsize, Indexer, 3>::function_type nan_handler = NaNHandler<fsize, Indexer, 3>::GetDefault()) {
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static_assert(fsize == 32 || fsize == 64, "fsize must be either 32 or 64");
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static_assert(fsize == 32 || fsize == 64, "fsize must be either 32 or 64");
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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@ -371,15 +375,31 @@ void EmitThreeOpVectorOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* i
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const Xbyak::Xmm xmm_b = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm xmm_b = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm nan_mask = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm nan_mask = ctx.reg_alloc.ScratchXmm();
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code.movaps(nan_mask, xmm_b);
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code.movaps(result, xmm_a);
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code.movaps(result, xmm_a);
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FCODE(cmpunordp)(nan_mask, xmm_a);
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if (check_input_nan == CheckInputNaN::Yes) {
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if (code.HasAVX()) {
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FCODE(vcmpunordp)(nan_mask, xmm_a, xmm_b);
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} else {
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code.movaps(nan_mask, xmm_b);
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FCODE(cmpunordp)(nan_mask, xmm_a);
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}
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}
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if constexpr (std::is_member_function_pointer_v<Function>) {
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if constexpr (std::is_member_function_pointer_v<Function>) {
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(code.*fn)(result, xmm_b);
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(code.*fn)(result, xmm_b);
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} else {
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} else {
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fn(result, xmm_b);
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fn(result, xmm_b);
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}
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}
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FCODE(cmpunordp)(nan_mask, result);
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if (check_input_nan == CheckInputNaN::Yes) {
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FCODE(cmpunordp)(nan_mask, result);
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} else if (code.HasAVX()) {
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FCODE(vcmpunordp)(nan_mask, result, result);
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} else {
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code.movaps(nan_mask, result);
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FCODE(cmpunordp)(nan_mask, nan_mask);
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}
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HandleNaNs<fsize, 2>(code, ctx, fpcr_controlled, {result, xmm_a, xmm_b}, nan_mask, nan_handler);
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HandleNaNs<fsize, 2>(code, ctx, fpcr_controlled, {result, xmm_a, xmm_b}, nan_mask, nan_handler);
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@ -951,7 +971,7 @@ static void EmitFPVectorMinMax(BlockOfCode& code, EmitContext& ctx, IR::Inst* in
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code.andnps(mask, eq);
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code.andnps(mask, eq);
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code.orps(result, mask);
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code.orps(result, mask);
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}
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}
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});
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}, CheckInputNaN::Yes);
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}
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}
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void EmitX64::EmitFPVectorMax32(EmitContext& ctx, IR::Inst* inst) {
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void EmitX64::EmitFPVectorMax32(EmitContext& ctx, IR::Inst* inst) {
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