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IR: Add Breakpoint IR instruction (for debugging purposes, emits a host-breakpoint)

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This commit is contained in:
MerryMage 2016-08-05 14:07:27 +01:00
parent 39563c8ea8
commit ca40015145
4 changed files with 11 additions and 0 deletions
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4
src/backend_x64/emit_x64.cpp
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@ -87,6 +87,10 @@ CodePtr EmitX64::Emit(const Arm::LocationDescriptor descriptor, Dynarmic::IR::Bl
return code_ptr;
}
void EmitX64::EmitBreakpoint(IR::Block&, IR::Inst*) {
code->INT3();
}
void EmitX64::EmitIdentity(IR::Block& block, IR::Inst* inst) {
// TODO: Possible unnecessary mov here.
reg_alloc.UseDefRegister(inst->GetArg(0), inst, any_gpr);

4
src/frontend/ir/ir_emitter.cpp
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@ -261,6 +261,10 @@ void IREmitter::WriteMemory64(const IR::Value& vaddr, const IR::Value& value) {
}
}
void IREmitter::Breakpoint() {
Inst(IR::Opcode::Breakpoint, {});
}
void IREmitter::SetTerm(const IR::Terminal& terminal) {
ASSERT_MSG(block.terminal.which() == 0, "Terminal has already been set.");
block.terminal = terminal;

2
src/frontend/ir/ir_emitter.h
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@ -89,6 +89,8 @@ public:
void WriteMemory32(const IR::Value& vaddr, const IR::Value& value);
void WriteMemory64(const IR::Value& vaddr, const IR::Value& value);
void Breakpoint();
void SetTerm(const IR::Terminal& terminal);
private:

1
src/frontend/ir/opcodes.inc
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@ -1,6 +1,7 @@
// opcode name, return type, arg1 type, arg2 type, arg3 type, ...
OPCODE(Identity, T::Opaque, T::Opaque )
OPCODE(Breakpoint, T::Void, )
// ARM Context getters/setters
OPCODE(GetRegister, T::U32, T::RegRef )