mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

A64: Implement CMTST's scalar variant

Browse source
This commit is contained in:
Lioncash 2018-04-27 08:33:11 -04:00 committed by MerryMage
parent 0d20423ad5
commit cda75e2079
2 changed files with 15 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/frontend/A64/decoder/a64.inc
View file

@ -452,7 +452,7 @@ INST(CMGE_reg_1, "CMGE (register)", "01011
//INST(SRSHL_1, "SRSHL", "01011110zz1mmmmm010101nnnnnddddd") //INST(SRSHL_1, "SRSHL", "01011110zz1mmmmm010101nnnnnddddd")
//INST(SQRSHL_1, "SQRSHL", "01011110zz1mmmmm010111nnnnnddddd") //INST(SQRSHL_1, "SQRSHL", "01011110zz1mmmmm010111nnnnnddddd")
INST(ADD_1, "ADD (vector)", "01011110zz1mmmmm100001nnnnnddddd") INST(ADD_1, "ADD (vector)", "01011110zz1mmmmm100001nnnnnddddd")
//INST(CMTST_1, "CMTST", "01011110zz1mmmmm100011nnnnnddddd") INST(CMTST_1, "CMTST", "01011110zz1mmmmm100011nnnnnddddd")
//INST(SQDMULH_vec_1, "SQDMULH (vector)", "01011110zz1mmmmm101101nnnnnddddd") //INST(SQDMULH_vec_1, "SQDMULH (vector)", "01011110zz1mmmmm101101nnnnnddddd")
//INST(UQADD_1, "UQADD", "01111110zz1mmmmm000011nnnnnddddd") //INST(UQADD_1, "UQADD", "01111110zz1mmmmm000011nnnnnddddd")
//INST(UQSUB_1, "UQSUB", "01111110zz1mmmmm001011nnnnnddddd") //INST(UQSUB_1, "UQSUB", "01111110zz1mmmmm001011nnnnnddddd")

14
src/frontend/A64/translate/impl/simd_scalar_three_same.cpp
View file

@ -116,6 +116,20 @@ bool TranslatorVisitor::CMHS_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
return ScalarCompare(*this, size, Vm, Vn, Vd, ComparisonType::HS, ComparisonVariant::Register); return ScalarCompare(*this, size, Vm, Vn, Vd, ComparisonType::HS, ComparisonVariant::Register);
} }
bool TranslatorVisitor::CMTST_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size != 0b11) {
return ReservedValue();
}
const IR::U128 operand1 = V(64, Vn);
const IR::U128 operand2 = V(64, Vm);
const IR::U128 anded = ir.VectorAnd(operand1, operand2);
const IR::U128 result = ir.VectorNot(ir.VectorEqual(64, anded, ir.ZeroVector()));
V(64, Vd, result);
return true;
}
bool TranslatorVisitor::SUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { bool TranslatorVisitor::SUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size != 0b11) { if (size != 0b11) {
return ReservedValue(); return ReservedValue();