A64: Implement CMTST's scalar variant
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0d20423ad5
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cda75e2079
2 changed files with 15 additions and 1 deletions
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@ -452,7 +452,7 @@ INST(CMGE_reg_1, "CMGE (register)", "01011
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//INST(SRSHL_1, "SRSHL", "01011110zz1mmmmm010101nnnnnddddd")
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//INST(SQRSHL_1, "SQRSHL", "01011110zz1mmmmm010111nnnnnddddd")
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INST(ADD_1, "ADD (vector)", "01011110zz1mmmmm100001nnnnnddddd")
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//INST(CMTST_1, "CMTST", "01011110zz1mmmmm100011nnnnnddddd")
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INST(CMTST_1, "CMTST", "01011110zz1mmmmm100011nnnnnddddd")
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//INST(SQDMULH_vec_1, "SQDMULH (vector)", "01011110zz1mmmmm101101nnnnnddddd")
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//INST(UQADD_1, "UQADD", "01111110zz1mmmmm000011nnnnnddddd")
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//INST(UQSUB_1, "UQSUB", "01111110zz1mmmmm001011nnnnnddddd")
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@ -116,6 +116,20 @@ bool TranslatorVisitor::CMHS_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
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return ScalarCompare(*this, size, Vm, Vn, Vd, ComparisonType::HS, ComparisonVariant::Register);
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}
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bool TranslatorVisitor::CMTST_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
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if (size != 0b11) {
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return ReservedValue();
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}
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const IR::U128 operand1 = V(64, Vn);
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const IR::U128 operand2 = V(64, Vm);
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const IR::U128 anded = ir.VectorAnd(operand1, operand2);
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const IR::U128 result = ir.VectorNot(ir.VectorEqual(64, anded, ir.ZeroVector()));
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V(64, Vd, result);
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return true;
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}
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bool TranslatorVisitor::SUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
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if (size != 0b11) {
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return ReservedValue();
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