thumb32: Implement EOR (reg)
This commit is contained in:
parent
158a13173c
commit
d2d996e6ba
3 changed files with 20 additions and 1 deletions
|
@ -37,7 +37,7 @@ INST(thumb32_ORR_reg, "ORR (reg)", "11101010010Snnnn0vvvdd
|
||||||
INST(thumb32_MVN_reg, "MVN (reg)", "11101010011S11110vvvddddvvttmmmm")
|
INST(thumb32_MVN_reg, "MVN (reg)", "11101010011S11110vvvddddvvttmmmm")
|
||||||
INST(thumb32_ORN_reg, "ORN (reg)", "11101010011Snnnn0vvvddddvvttmmmm")
|
INST(thumb32_ORN_reg, "ORN (reg)", "11101010011Snnnn0vvvddddvvttmmmm")
|
||||||
INST(thumb32_TEQ_reg, "TEQ (reg)", "111010101001nnnn0vvv1111vvttmmmm")
|
INST(thumb32_TEQ_reg, "TEQ (reg)", "111010101001nnnn0vvv1111vvttmmmm")
|
||||||
//INST(thumb32_EOR_reg, "EOR (reg)", "11101010100---------------------")
|
INST(thumb32_EOR_reg, "EOR (reg)", "11101010100Snnnn0vvvddddvvttmmmm")
|
||||||
//INST(thumb32_PKH, "PKH", "11101010110---------------------")
|
//INST(thumb32_PKH, "PKH", "11101010110---------------------")
|
||||||
//INST(thumb32_CMN_reg, "CMN (reg)", "111010110001--------1111--------")
|
//INST(thumb32_CMN_reg, "CMN (reg)", "111010110001--------1111--------")
|
||||||
//INST(thumb32_ADD_reg, "ADD (reg)", "11101011000---------------------")
|
//INST(thumb32_ADD_reg, "ADD (reg)", "11101011000---------------------")
|
||||||
|
|
|
@ -137,4 +137,22 @@ bool ThumbTranslatorVisitor::thumb32_TEQ_reg(Reg n, Imm<3> imm3, Imm<2> imm2, Sh
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
bool ThumbTranslatorVisitor::thumb32_EOR_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m) {
|
||||||
|
ASSERT_MSG(!(d == Reg::PC && S), "Decode error");
|
||||||
|
|
||||||
|
if ((d == Reg::PC && !S) || n == Reg::PC || m == Reg::PC) {
|
||||||
|
return UnpredictableInstruction();
|
||||||
|
}
|
||||||
|
|
||||||
|
const auto shifted = EmitImmShift(ir.GetRegister(m), type, imm3, imm2, ir.GetCFlag());
|
||||||
|
const auto result = ir.Eor(ir.GetRegister(n), shifted.result);
|
||||||
|
ir.SetRegister(d, result);
|
||||||
|
if (S) {
|
||||||
|
ir.SetNFlag(ir.MostSignificantBit(result));
|
||||||
|
ir.SetZFlag(ir.IsZero(result));
|
||||||
|
ir.SetCFlag(shifted.carry);
|
||||||
|
}
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
} // namespace Dynarmic::A32
|
} // namespace Dynarmic::A32
|
||||||
|
|
|
@ -180,6 +180,7 @@ struct ThumbTranslatorVisitor final {
|
||||||
bool thumb32_MVN_reg(bool S, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
|
bool thumb32_MVN_reg(bool S, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
|
||||||
bool thumb32_ORN_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
|
bool thumb32_ORN_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
|
||||||
bool thumb32_TEQ_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m);
|
bool thumb32_TEQ_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m);
|
||||||
|
bool thumb32_EOR_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
|
||||||
|
|
||||||
// thumb32 data processing (modified immediate) instructions
|
// thumb32 data processing (modified immediate) instructions
|
||||||
bool thumb32_TST_imm(Imm<1> i, Reg n, Imm<3> imm3, Imm<8> imm8);
|
bool thumb32_TST_imm(Imm<1> i, Reg n, Imm<3> imm3, Imm<8> imm8);
|
||||||
|
|
Loading…
Reference in a new issue