A64: Implement CLS

This is not the cleanest implementation.
This commit is contained in:
MerryMage 2018-01-23 18:22:42 +00:00
parent b8e26bfdc3
commit d4b05b28cf
2 changed files with 11 additions and 1 deletions

View file

@ -289,7 +289,7 @@ INST(RORV, "RORV", "z0011
INST(REV16_int, "REV16", "z101101011000000000001nnnnnddddd")
INST(REV, "REV", "z10110101100000000001onnnnnddddd")
INST(CLZ_int, "CLZ", "z101101011000000000100nnnnnddddd")
//INST(CLS_int, "CLS", "z101101011000000000101nnnnnddddd")
INST(CLS_int, "CLS", "z101101011000000000101nnnnnddddd")
INST(REV32_int, "REV32", "1101101011000000000010nnnnnddddd")
//INST(PACDA, "PACDA, PACDZA", "110110101100000100Z010nnnnnddddd")
//INST(PACDB, "PACDB, PACDZB", "110110101100000100Z011nnnnnddddd")

View file

@ -19,6 +19,16 @@ bool TranslatorVisitor::CLZ_int(bool sf, Reg Rn, Reg Rd) {
return true;
}
bool TranslatorVisitor::CLS_int(bool sf, Reg Rn, Reg Rd) {
const size_t datasize = sf ? 64 : 32;
const IR::U32U64 operand = X(datasize, Rn);
const IR::U32U64 result = ir.Sub(ir.CountLeadingZeros(ir.Eor(operand, ir.ArithmeticShiftRight(operand, ir.Imm8(u8(datasize))))), I(datasize, 1));
X(datasize, Rd, result);
return true;
}
bool TranslatorVisitor::REV(bool sf, bool opc_0, Reg Rn, Reg Rd) {
const size_t datasize = sf ? 64 : 32;