Implement thumb POP instruction
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f7e3d7b8d2
commit
dfef65d98f
6 changed files with 45 additions and 6 deletions
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@ -82,7 +82,7 @@ static CPUCaps Detect() {
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caps.vendor = CPUVendor::OTHER;
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// Set reasonable default brand string even if brand string not available
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strcpy_s(caps.cpu_string, caps.brand_string);
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strcpy_s(caps.cpu_string, sizeof(caps.cpu_string), caps.brand_string);
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// Detect family and other miscellaneous features
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if (max_std_fn >= 1) {
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@ -125,7 +125,7 @@ boost::optional<const Thumb16Matcher<V>&> DecodeThumb16(u16 instruction) {
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INST(&V::thumb16_UXTH, "UXTH", "1011001010mmmddd"), // v6
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INST(&V::thumb16_UXTB, "UXTB", "1011001011mmmddd"), // v6
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INST(&V::thumb16_PUSH, "PUSH", "1011010Mxxxxxxxx"), // v4T
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//INST(&V::thumb16_POP, "POP", "1011110rxxxxxxxx"), // v4T
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INST(&V::thumb16_POP, "POP", "1011110Pxxxxxxxx"), // v4T
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//INST(&V::thumb16_SETEND, "SETEND", "101101100101x000"), // v6
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//INST(&V::thumb16_CPS, "CPS", "10110110011m0aif"), // v6
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INST(&V::thumb16_REV, "REV", "1011101000mmmddd"), // v6
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@ -298,6 +298,24 @@ public:
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return ret;
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}
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std::string thumb16_POP(bool P, RegList reg_list) {
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if (P)
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reg_list |= 1 << 15;
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std::string ret = "PUSH ";
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bool first_reg = true;
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for (size_t i = 0; i < 16; i++) {
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if (Common::Bit(i, reg_list)) {
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if (!first_reg)
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ret += ", ";
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ret += RegStr(static_cast<Reg>(i));
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first_reg = false;
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}
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}
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return ret;
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}
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std::string thumb16_REV(Reg m, Reg d) {
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return Common::StringFromFormat("rev %s, %s", RegStr(d), RegStr(m));
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}
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@ -515,11 +515,12 @@ struct ThumbTranslatorVisitor final {
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}
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// PUSH <reg_list>
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// reg_list cannot encode for R15.
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u32 num_bytes_to_push = static_cast<u32>(4 * Common::BitCount(reg_list));
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const u32 num_bytes_to_push = static_cast<u32>(4 * Common::BitCount(reg_list));
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const auto final_address = ir.Sub(ir.GetRegister(Reg::SP), ir.Imm32(num_bytes_to_push));
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auto address = final_address;
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for (size_t i = 0; i < 16; i++) {
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if (Common::Bit(i, reg_list)) {
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// TODO: Deal with alignment
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auto Ri = ir.GetRegister(static_cast<Reg>(i));
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ir.WriteMemory32(address, Ri);
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address = ir.Add(address, ir.Imm32(4));
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@ -530,6 +531,26 @@ struct ThumbTranslatorVisitor final {
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return true;
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}
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bool thumb16_POP(bool P, RegList reg_list) {
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if (P) reg_list |= 1 << 15;
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if (Common::BitCount(reg_list) < 1) {
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return UnpredictableInstruction();
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}
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// POP <reg_list>
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auto address = ir.GetRegister(Reg::SP);
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for (size_t i = 0; i < 15; i++) {
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if (Common::Bit(i, reg_list)) {
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// TODO: Deal with alignment
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auto data = ir.ReadMemory32(address);
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ir.SetRegister(static_cast<Reg>(i), data);
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address = ir.Add(address, ir.Imm32(4));
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}
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}
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ir.SetRegister(Reg::SP, address);
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// TODO(optimization): Possible location for an RSB push.
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return true;
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}
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bool thumb16_REV(Reg m, Reg d) {
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// REV <Rd>, <Rm>
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// Rd cannot encode R15.
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@ -391,4 +391,4 @@ TEST_CASE("Fuzz ARM reversal instructions", "[JitX64]") {
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return reg_instructions[2].Generate();
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});
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}
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}
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}
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@ -163,7 +163,6 @@ static bool DoesBehaviorMatch(const ARMul_State& interp, const Dynarmic::Jit& ji
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&& interp_write_records == jit_write_records;
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}
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void FuzzJitThumb(const size_t instruction_count, const size_t instructions_to_execute_count, const size_t run_count, const std::function<u16()> instruction_generator) {
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// Prepare memory
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code_mem.fill(0xE7FE); // b +#0
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@ -274,7 +273,8 @@ TEST_CASE("Fuzz Thumb instructions set 1", "[JitX64][Thumb]") {
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ThumbInstGen("1001xxxxxxxxxxxx"), // LDR/STR Rd, [SP, #]
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ThumbInstGen("10110100xxxxxxxx", // PUSH (R = 0)
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[](u16 inst){ return Dynarmic::Common::Bits<0, 7>(inst) != 0; }), // Empty reg_list is UNPREDICTABLE
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ThumbInstGen("10111100xxxxxxxx"), // POP (R = 0)
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ThumbInstGen("10111100xxxxxxxx", // POP (R = 0)
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[](u16 inst){ return Dynarmic::Common::Bits<0, 7>(inst) != 0; }), // Empty reg_list is UNPREDICTABLE
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ThumbInstGen("1100xxxxxxxxxxxx"), // STMIA/LDMIA
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//ThumbInstGen("101101100101x000"), // SETEND
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}};
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