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simd_scalar_shift_by_immediate: Migrate SQSHL implementation to file-scope function

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This will allow it to be reused for the implementation of UQSHL.
This commit is contained in:
Lioncash 2019-04-10 15:05:56 -04:00 committed by MerryMage
parent 55a30ef2cf
commit e1b4ff1068
1 changed files with 17 additions and 13 deletions
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30
src/frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp
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@ -30,6 +30,22 @@ enum class FloatConversionDirection {
FloatToFixed, FloatToFixed,
}; };
bool SaturatingShiftLeft(TranslatorVisitor& v, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
if (immh == 0b0000) {
return v.UnallocatedEncoding();
}
const size_t esize = 8U << Common::HighestSetBit(immh.ZeroExtend());
const size_t shift_amount = concatenate(immh, immb).ZeroExtend() - esize;
const IR::U128 operand = v.ir.ZeroExtendToQuad(v.V_scalar(esize, Vn));
const IR::U128 shift = v.ir.ZeroExtendToQuad(v.I(esize, shift_amount));
const IR::U128 result = v.ir.VectorSignedSaturatedShiftLeft(esize, operand, shift);
v.ir.SetQ(Vd, result);
return true;
}
bool ShiftRight(TranslatorVisitor& v, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd, bool ShiftRight(TranslatorVisitor& v, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd,
ShiftExtraBehavior behavior, Signedness signedness) { ShiftExtraBehavior behavior, Signedness signedness) {
if (!immh.Bit<3>()) { if (!immh.Bit<3>()) {
@ -254,19 +270,7 @@ bool TranslatorVisitor::SRI_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
} }
bool TranslatorVisitor::SQSHL_imm_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) { bool TranslatorVisitor::SQSHL_imm_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
if (immh == 0b0000) { return SaturatingShiftLeft(*this, immh, immb, Vn, Vd);
return UnallocatedEncoding();
}
const size_t esize = 8U << Common::HighestSetBit(immh.ZeroExtend());
const size_t shift_amount = concatenate(immh, immb).ZeroExtend() - esize;
const IR::U128 operand = ir.ZeroExtendToQuad(V_scalar(esize, Vn));
const IR::U128 shift = ir.ZeroExtendToQuad(I(esize, shift_amount));
const IR::U128 result = ir.VectorSignedSaturatedShiftLeft(esize, operand, shift);
ir.SetQ(Vd, result);
return true;
} }
bool TranslatorVisitor::SQSHRN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) { bool TranslatorVisitor::SQSHRN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {