emit_x64_vector_floating_point: Hardware FMA implementation of FPVectorRecipStepFused
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1 changed files with 60 additions and 13 deletions
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@ -151,6 +151,12 @@ Xbyak::Address GetSmallestNormalVector(BlockOfCode& code) {
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return GetVectorOf<fsize, smallest_normal_number>(code);
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return GetVectorOf<fsize, smallest_normal_number>(code);
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}
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}
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template<size_t fsize, bool sign, int exponent, mp::unsigned_integer_of_size<fsize> value>
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Xbyak::Address GetVectorOf(BlockOfCode& code) {
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using FPT = mp::unsigned_integer_of_size<fsize>;
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return GetVectorOf<fsize, FP::FPValue<FPT, sign, exponent, value>()>(code);
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}
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template<size_t fsize>
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template<size_t fsize>
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void ForceToDefaultNaN(BlockOfCode& code, EmitContext& ctx, Xbyak::Xmm result) {
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void ForceToDefaultNaN(BlockOfCode& code, EmitContext& ctx, Xbyak::Xmm result) {
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if (ctx.FPSCR_DN()) {
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if (ctx.FPSCR_DN()) {
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@ -357,16 +363,9 @@ void EmitTwoOpFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lamb
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}
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}
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template<typename Lambda>
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template<typename Lambda>
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void EmitThreeOpFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lambda lambda) {
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void EmitThreeOpFallbackWithoutRegAlloc(BlockOfCode& code, EmitContext& ctx, Xbyak::Xmm result, Xbyak::Xmm arg1, Xbyak::Xmm arg2, Lambda lambda) {
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const auto fn = static_cast<mp::equivalent_function_type_t<Lambda>*>(lambda);
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const auto fn = static_cast<mp::equivalent_function_type_t<Lambda>*>(lambda);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm arg1 = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm arg2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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ctx.reg_alloc.EndOfAllocScope();
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ctx.reg_alloc.HostCall(nullptr);
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#ifdef _WIN32
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#ifdef _WIN32
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constexpr u32 stack_space = 4 * 16;
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constexpr u32 stack_space = 4 * 16;
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code.sub(rsp, stack_space + ABI_SHADOW_SPACE);
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code.sub(rsp, stack_space + ABI_SHADOW_SPACE);
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@ -397,6 +396,18 @@ void EmitThreeOpFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, La
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#endif
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#endif
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code.add(rsp, stack_space + ABI_SHADOW_SPACE);
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code.add(rsp, stack_space + ABI_SHADOW_SPACE);
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}
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template<typename Lambda>
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void EmitThreeOpFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lambda lambda) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm arg1 = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm arg2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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ctx.reg_alloc.EndOfAllocScope();
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ctx.reg_alloc.HostCall(nullptr);
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EmitThreeOpFallbackWithoutRegAlloc(code, ctx, result, arg1, arg2, lambda);
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ctx.reg_alloc.DefineValue(inst, result);
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ctx.reg_alloc.DefineValue(inst, result);
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}
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}
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@ -821,21 +832,57 @@ void EmitX64::EmitFPVectorRecipEstimate64(EmitContext& ctx, IR::Inst* inst) {
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EmitRecipEstimate<u64>(code, ctx, inst);
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EmitRecipEstimate<u64>(code, ctx, inst);
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}
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}
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template<typename FPT>
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template<size_t fsize>
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static void EmitRecipStepFused(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
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static void EmitRecipStepFused(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
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EmitThreeOpFallback(code, ctx, inst, [](VectorArray<FPT>& result, const VectorArray<FPT>& op1, const VectorArray<FPT>& op2, FP::FPCR fpcr, FP::FPSR& fpsr) {
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using FPT = mp::unsigned_integer_of_size<fsize>;
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const auto fallback_fn = [](VectorArray<FPT>& result, const VectorArray<FPT>& op1, const VectorArray<FPT>& op2, FP::FPCR fpcr, FP::FPSR& fpsr) {
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for (size_t i = 0; i < result.size(); i++) {
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for (size_t i = 0; i < result.size(); i++) {
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result[i] = FP::FPRecipStepFused<FPT>(op1[i], op2[i], fpcr, fpsr);
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result[i] = FP::FPRecipStepFused<FPT>(op1[i], op2[i], fpcr, fpsr);
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}
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}
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});
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};
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if (code.DoesCpuSupport(Xbyak::util::Cpu::tFMA) && code.DoesCpuSupport(Xbyak::util::Cpu::tAVX)) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm operand1 = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm operand2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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Xbyak::Label end, fallback;
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code.movaps(result, GetVectorOf<fsize, false, 0, 2>(code));
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FCODE(vfnmadd231p)(result, operand1, operand2);
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FCODE(vcmpunordp)(tmp, result, result);
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code.vptest(tmp, tmp);
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code.jnz(fallback, code.T_NEAR);
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code.L(end);
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code.SwitchToFarCode();
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code.L(fallback);
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code.sub(rsp, 8);
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ABI_PushCallerSaveRegistersAndAdjustStackExcept(code, HostLocXmmIdx(result.getIdx()));
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EmitThreeOpFallbackWithoutRegAlloc(code, ctx, result, operand1, operand2, fallback_fn);
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ABI_PopCallerSaveRegistersAndAdjustStackExcept(code, HostLocXmmIdx(result.getIdx()));
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code.add(rsp, 8);
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code.jmp(end, code.T_NEAR);
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code.SwitchToNearCode();
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ctx.reg_alloc.DefineValue(inst, result);
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return;
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}
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EmitThreeOpFallback(code, ctx, inst, fallback_fn);
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}
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}
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void EmitX64::EmitFPVectorRecipStepFused32(EmitContext& ctx, IR::Inst* inst) {
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void EmitX64::EmitFPVectorRecipStepFused32(EmitContext& ctx, IR::Inst* inst) {
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EmitRecipStepFused<u32>(code, ctx, inst);
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EmitRecipStepFused<32>(code, ctx, inst);
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}
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}
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void EmitX64::EmitFPVectorRecipStepFused64(EmitContext& ctx, IR::Inst* inst) {
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void EmitX64::EmitFPVectorRecipStepFused64(EmitContext& ctx, IR::Inst* inst) {
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EmitRecipStepFused<u64>(code, ctx, inst);
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EmitRecipStepFused<64>(code, ctx, inst);
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}
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}
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template<size_t fsize>
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template<size_t fsize>
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