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tests: Add FMLA(lane) test

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Math operations such as Matrix multiplication utilize these particular
instructions enough that there should be some unit tests for thesein particular.
The lane-splatting form of FMUL and FMLA instructions are of particular
interest and I've found them to be very common in retail game binaries
such as Pokemon Sword.

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/coding-for-neon---part-3-matrix-multiplication

I'm primarily adding this unit test so that I can ensure compatibility
while I tune and optimize them.
This commit is contained in:
Wunkolo 2021-07-17 16:43:55 -07:00 committed by merry
parent d41bc492fe
commit f171ce7859
1 changed files with 51 additions and 0 deletions
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51
tests/A64/a64.cpp
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@ -675,6 +675,57 @@ TEST_CASE("A64: FMADD", "[a64]") {
REQUIRE(jit.GetVector(10) == Vector{0x3f059921bf0dbfff, 0x0000000000000000});
}
TEST_CASE("A64: FMLA.4S(lane)", "[a64]") {
A64TestEnv env;
A64::Jit jit{A64::UserConfig{&env}};
env.code_mem.emplace_back(0x4f8f11c0); // FMLA.4S V0, V14, V15[0]
env.code_mem.emplace_back(0x4faf11c1); // FMLA.4S V1, V14, V15[1]
env.code_mem.emplace_back(0x4f8f19c2); // FMLA.4S V2, V14, V15[2]
env.code_mem.emplace_back(0x4faf19c3); // FMLA.4S V3, V14, V15[3]
env.code_mem.emplace_back(0x14000000); // B .
jit.SetPC(0);
jit.SetVector(0, {0x3ff00000'3ff00000, 0x00000000'00000000});
jit.SetVector(1, {0x3ff00000'3ff00000, 0x00000000'00000000});
jit.SetVector(2, {0x3ff00000'3ff00000, 0x00000000'00000000});
jit.SetVector(3, {0x3ff00000'3ff00000, 0x00000000'00000000});
jit.SetVector(14, {0x3ff00000'3ff00000, 0x3ff00000'3ff00000});
jit.SetVector(15, {0x3ff00000'40000000, 0x40400000'40800000});
env.ticks_left = 5;
jit.Run();
REQUIRE(jit.GetVector(0) == Vector{0x40b4000040b40000, 0x4070000040700000});
REQUIRE(jit.GetVector(1) == Vector{0x40ac800040ac8000, 0x4061000040610000});
REQUIRE(jit.GetVector(2) == Vector{0x4116000041160000, 0x40f0000040f00000});
REQUIRE(jit.GetVector(3) == Vector{0x40f0000040f00000, 0x40b4000040b40000});
}
TEST_CASE("A64: FMUL.4S(lane)", "[a64]") {
A64TestEnv env;
A64::Jit jit{A64::UserConfig{&env}};
env.code_mem.emplace_back(0x4f8f91c0); // FMUL.4S V0, V14, V15[0]
env.code_mem.emplace_back(0x4faf91c1); // FMUL.4S V1, V14, V15[1]
env.code_mem.emplace_back(0x4f8f99c2); // FMUL.4S V2, V14, V15[2]
env.code_mem.emplace_back(0x4faf99c3); // FMUL.4S V3, V14, V15[3]
env.code_mem.emplace_back(0x14000000); // B .
jit.SetPC(0);
jit.SetVector(14, {0x3ff00000'3ff00000, 0x3ff00000'3ff00000});
jit.SetVector(15, {0x3ff00000'40000000, 0x40400000'40800000});
env.ticks_left = 5;
jit.Run();
REQUIRE(jit.GetVector(0) == Vector{0x4070000040700000, 0x4070000040700000});
REQUIRE(jit.GetVector(1) == Vector{0x4061000040610000, 0x4061000040610000});
REQUIRE(jit.GetVector(2) == Vector{0x40f0000040f00000, 0x40f0000040f00000});
REQUIRE(jit.GetVector(3) == Vector{0x40b4000040b40000, 0x40b4000040b40000});
}
TEST_CASE("A64: FMLA.4S (denormal)", "[a64]") {
A64TestEnv env;
A64::Jit jit{A64::UserConfig{&env}};