IR: Implement VectorLogicalShiftLeft{8,16,32,64}

src/backend_x64/emit_x64_vector.cpp

@@ -587,6 +587,53 @@ void EmitX64::EmitVectorPairedAdd64(EmitContext& ctx, IR::Inst* inst) {
     ctx.reg_alloc.DefineValue(inst, a);
 }
 
+void EmitX64::EmitVectorLogicalShiftLeft8(EmitContext& ctx, IR::Inst* inst) {
+    auto args = ctx.reg_alloc.GetArgumentInfo(inst);
+
+    Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
+    const u8 shift_amount = args[1].GetImmediateU8();
+
+    // TODO: Optimize
+    for (size_t i = 0; i < shift_amount; ++i) {
+        code.paddb(result, result);
+    }
+
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+void EmitX64::EmitVectorLogicalShiftLeft16(EmitContext& ctx, IR::Inst* inst) {
+    auto args = ctx.reg_alloc.GetArgumentInfo(inst);
+
+    Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
+    const u8 shift_amount = args[1].GetImmediateU8();
+
+    code.psllw(result, shift_amount);
+
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+void EmitX64::EmitVectorLogicalShiftLeft32(EmitContext& ctx, IR::Inst* inst) {
+    auto args = ctx.reg_alloc.GetArgumentInfo(inst);
+
+    Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
+    const u8 shift_amount = args[1].GetImmediateU8();
+
+    code.pslld(result, shift_amount);
+
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+void EmitX64::EmitVectorLogicalShiftLeft64(EmitContext& ctx, IR::Inst* inst) {
+    auto args = ctx.reg_alloc.GetArgumentInfo(inst);
+
+    Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
+    const u8 shift_amount = args[1].GetImmediateU8();
+
+    code.psllq(result, shift_amount);
+
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
 void EmitX64::EmitVectorZeroUpper(EmitContext& ctx, IR::Inst* inst) {
     auto args = ctx.reg_alloc.GetArgumentInfo(inst);
 

src/frontend/ir/ir_emitter.cpp

@@ -873,6 +873,22 @@ U128 IREmitter::VectorInterleaveLower64(const U128& a, const U128& b) {
     return Inst<U128>(Opcode::VectorInterleaveLower64, a, b);
 }
 
+U128 IREmitter::VectorLogicalShiftLeft8(const U128& a, u8 shift_amount) {
+    return Inst<U128>(Opcode::VectorLogicalShiftLeft8, a, Imm8(shift_amount));
+}
+
+U128 IREmitter::VectorLogicalShiftLeft16(const U128& a, u8 shift_amount) {
+    return Inst<U128>(Opcode::VectorLogicalShiftLeft16, a, Imm8(shift_amount));
+}
+
+U128 IREmitter::VectorLogicalShiftLeft32(const U128& a, u8 shift_amount) {
+    return Inst<U128>(Opcode::VectorLogicalShiftLeft32, a, Imm8(shift_amount));
+}
+
+U128 IREmitter::VectorLogicalShiftLeft64(const U128& a, u8 shift_amount) {
+    return Inst<U128>(Opcode::VectorLogicalShiftLeft64, a, Imm8(shift_amount));
+}
+
 U128 IREmitter::VectorNot(const U128& a) {
     return Inst<U128>(Opcode::VectorNot, a);
 }

src/frontend/ir/ir_emitter.h

@@ -229,6 +229,10 @@ public:
     U128 VectorInterleaveLower16(const U128& a, const U128& b);
     U128 VectorInterleaveLower32(const U128& a, const U128& b);
     U128 VectorInterleaveLower64(const U128& a, const U128& b);
+    U128 VectorLogicalShiftLeft8(const U128& a, u8 shift_amount);
+    U128 VectorLogicalShiftLeft16(const U128& a, u8 shift_amount);
+    U128 VectorLogicalShiftLeft32(const U128& a, u8 shift_amount);
+    U128 VectorLogicalShiftLeft64(const U128& a, u8 shift_amount);
     U128 VectorNot(const U128& a);
     U128 VectorOr(const U128& a, const U128& b);
     U128 VectorPairedAdd8(const U128& a, const U128& b);

src/frontend/ir/opcodes.inc

@@ -220,6 +220,10 @@ OPCODE(VectorInterleaveLower8,  T::U128,        T::U128,        T::U128
 OPCODE(VectorInterleaveLower16,     T::U128,        T::U128,        T::U128                         )
 OPCODE(VectorInterleaveLower32,     T::U128,        T::U128,        T::U128                         )
 OPCODE(VectorInterleaveLower64,     T::U128,        T::U128,        T::U128                         )
+OPCODE(VectorLogicalShiftLeft8,     T::U128,        T::U128,        T::U8                           )
+OPCODE(VectorLogicalShiftLeft16,    T::U128,        T::U128,        T::U8                           )
+OPCODE(VectorLogicalShiftLeft32,    T::U128,        T::U128,        T::U8                           )
+OPCODE(VectorLogicalShiftLeft64,    T::U128,        T::U128,        T::U8                           )
 OPCODE(VectorNot,                   T::U128,        T::U128                                         )
 OPCODE(VectorOr,                    T::U128,        T::U128,        T::U128                         )
 OPCODE(VectorPairedAddLower8,       T::U128,        T::U128,        T::U128                         )