thumb32: Implement LSL (register)

This commit is contained in:
Lioncash 2021-02-23 04:37:31 -05:00
parent ac32175eff
commit fdd379a36c
3 changed files with 15 additions and 1 deletions

View file

@ -189,7 +189,7 @@ INST(thumb32_BLX_imm, "BLX (imm)", "11110Svvvvvvvvvv11j0jv
//INST(thumb32_LDR_imm12, "LDR (imm12)", "111110001101--------------------")
// Data Processing (register)
//INST(thumb32_LSL_reg, "LSL (reg)", "11111010000-----1111----0000----")
INST(thumb32_LSL_reg, "LSL (reg)", "111110100000mmmm1111dddd0000ssss")
//INST(thumb32_LSR_reg, "LSR (reg)", "11111010001-----1111----0000----")
//INST(thumb32_ASR_reg, "ASR (reg)", "11111010010-----1111----0000----")
//INST(thumb32_ROR_reg, "ROR (reg)", "11111010011-----1111----0000----")

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@ -11,6 +11,19 @@ static IR::U32 Rotate(A32::IREmitter& ir, Reg m, SignExtendRotation rotate) {
return ir.RotateRight(ir.GetRegister(m), ir.Imm8(rotate_by), ir.Imm1(0)).result;
}
bool ThumbTranslatorVisitor::thumb32_LSL_reg(Reg m, Reg d, Reg s) {
if (d == Reg::PC || m == Reg::PC || s == Reg::PC) {
return UnpredictableInstruction();
}
const auto shift_s = ir.LeastSignificantByte(ir.GetRegister(s));
const auto apsr_c = ir.GetCFlag();
const auto result_carry = ir.LogicalShiftLeft(ir.GetRegister(m), shift_s, apsr_c);
ir.SetRegister(d, result_carry.result);
return true;
}
bool ThumbTranslatorVisitor::thumb32_SXTB(Reg d, SignExtendRotation rotate, Reg m) {
if (d == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();

View file

@ -182,6 +182,7 @@ struct ThumbTranslatorVisitor final {
bool thumb32_BLX_imm(Imm<1> S, Imm<10> hi, Imm<1> j1, Imm<1> j2, Imm<11> lo);
// thumb32 data processing (register) instructions
bool thumb32_LSL_reg(Reg m, Reg d, Reg s);
bool thumb32_SXTB(Reg d, SignExtendRotation rotate, Reg m);
bool thumb32_SXTB16(Reg d, SignExtendRotation rotate, Reg m);
bool thumb32_SXTAB(Reg n, Reg d, SignExtendRotation rotate, Reg m);