Commit graph

2344 commits

Author SHA1 Message Date
Merry
6a67da1225 Merge pull request #493 from lioncash/ir
frontend/ir/ir_emitter: Remove unnecessary logical shift overloads
2020-04-22 21:02:47 +01:00
Lioncash
64879396f6 A32: Implement Thumb-1 variant of NOP 2020-04-22 21:02:47 +01:00
Merry
30d28029a8 Merge pull request #492 from lioncash/vfp
A32: Rename vfp2-related files to vfp
2020-04-22 21:02:47 +01:00
Lioncash
c6f99235e1 frontend/ir/ir_emitter: Remove unnecessary logical shift overloads
These aren't necessary anymore, now that the U32U64 overload already
exists.
2020-04-22 21:02:46 +01:00
Merry
9ba503e394 Merge pull request #491 from lioncash/hint
A32: Allow hooking of hint instructions in ARM mode.
2020-04-22 21:02:46 +01:00
Lioncash
97277c598b A32: Rename vfp2-related files to vfp
Now that we fuzz against Unicorn, we aren't just restricted to VFPv2.
VFPv3 and VFPv4 facilities can now be implemented. This renames
constructs mentioning VFPv2 to just refer to VFP.
2020-04-22 21:02:46 +01:00
Lioncash
8c3122ff46 A64/translate/impl/impl: Mark locals const where applicable in DecodeBitMasks()
Follows the convention of making immutable state explicit.
2020-04-22 21:02:46 +01:00
Merry
a132b56d57 Merge pull request #490 from lioncash/crc32
A32: Implement ARM-mode CRC32 instructions
2020-04-22 21:02:46 +01:00
Lioncash
966e04d03d A32: Allow hooking of hint instructions in ARM mode.
Mirrors the hooking functionality from the AArch64 frontend to make the
behavior of both consistent.
2020-04-22 21:02:46 +01:00
Lioncash
134b586c5c frontend/ir/ir_emitter: Amend arguments to conversion opcodes
Accidentally caused within 967d1fcc8d6f60749a162a96b997439450fed687.
That one's on me. My bad.
2020-04-22 21:02:46 +01:00
MerryMage
5debb411cc block_of_code: Explicitly delete copy constructor 2020-04-22 21:02:46 +01:00
Lioncash
e37689315d A32: Implement ARM-mode CRC32 instructions
Implements the ARM-mode variants of the CRC32 instructions introduced
within ARMv8. This is also one of the instruction cases where there is
UNPREDICTABLE behavior that is constrained (we must do one of the
options indicated by the reference manual).

In both documented cases of constrained unpredictable behavior, we treat
the instructions as unpredictable in order to allow library users to
hook the unpredictable exception to provide the intended behavior they
desire.
2020-04-22 21:02:46 +01:00
Merry
dd79a3dc6b Merge pull request #489 from lioncash/imm
A32: Replace immediate type aliases with the Imm template
2020-04-22 21:02:46 +01:00
Lioncash
95d9baea67 {A32, A64}/types: Use std::array deduction guides where applicable
We also make the arrays static here, as MSVC tends to load the whole
array every time the function is called, instead of storing the data
within rodata.

This also line breaks the elements a little earlier for readability.
2020-04-22 21:02:46 +01:00
MerryMage
605a43d23e Suppress MSVC warning C4702: unreachable code 2020-04-22 21:02:46 +01:00
Lioncash
b1953c1cd4 travis: Make macOS builder use Xcode 10.2
Keeps it targeting the latest Xcode revision.
2020-04-22 21:02:46 +01:00
Lioncash
ead7cf49d1 externals: Update Catch to 2.7.2
Updates Catch from 2.7.0 to 2.7.2. Keeps the unit-testing library up to
date.
2020-04-22 21:02:46 +01:00
Lioncash
bac945f2d8 A32: Resolve parameter discrepancies discovered via use of the Imm template 2020-04-22 21:02:46 +01:00
Lioncash
e4c65721fe frontend/ir/type: Generify std::array declaration
With deduction guides, we can eliminate the need to explicitly size the
array. Also newlines the elements based off their relation, making it
slightly nicer to read.
2020-04-22 21:02:46 +01:00
Lioncash
c098ade2e7 dynarmic_tests: Resolve CPSR discrepancies in tests
Unicorn internally checks if the LSB is set in order to determine
whether or not it should assume thumb mode internally. Clearing this
ourselves will always result in the incorrect PSR between runs.
2020-04-22 21:02:46 +01:00
Lioncash
f96036b3f1 A32/barrier: Correct PC assignment within ISB
The SetRegister() IR function doesn't allow specifying the PC as a
register. This is a discrepancy that slipped through (my bad). Instead,
we can use BranchWritePC(), like how the other similar PC modifying
locations do it.
2020-04-22 21:02:46 +01:00
Lioncash
4ba2318b2e A32: Replace immediate type aliases with the Imm template
Replaces type aliases of raw integral types with the more type-safe Imm
template, like how the AArch64 frontend has been using it.

This makes the two frontends more consistent with one another.
2020-04-22 21:02:46 +01:00
Lioncash
f01dc9192a CMakeLists: Add a namespace to the export
Avoids potentially dumping boost, fmt, and xbyak targets into a
top-level namespace without any qualification, which can lead to build
errors in projects that already make use of them.
2020-04-22 21:02:46 +01:00
Mat M
8b2d8231ba Merge pull request #488 from lioncash/imm
frontend: Move imm.h to the top-level directory of the frontends
2020-04-22 21:02:46 +01:00
Lioncash
196e7b5e35 frontend/A32/ir_emitter: Mark locals as const where applicable
Makes const usage consistent within the source file.
2020-04-22 21:02:46 +01:00
Lioncash
64e51a6d4d A32/disassembler_arm: Mark utility functions as static where applicable
These don't depend on class state and can be marked static to make that
explicit.
2020-04-22 21:02:46 +01:00
Lioncash
8103652a91 frontend: Move imm.h to the top-level directory of the frontends
Preparation to utilize the immediate type within the A32 backend as
well, which will allow eliminating numerous type aliases like Imm4,
Imm5, etc.
2020-04-22 21:02:46 +01:00
Lioncash
511613c736 frontend/A32/types: Use helper function in operator+ overload
Allows deduplicating an assert and a cast.
2020-04-22 21:02:46 +01:00
Mat M
c778816424 Merge pull request #487 from lioncash/fuzz2
a32/fuzz_arm: Use same fuzzing mechanism as AArch64
2020-04-22 21:02:46 +01:00
Lioncash
796bb8a7f7 frontend/A64/types: Make RegNumber() and VecNumber() constexpr
Given they simply perform casting, they can be safely made constexpr.
2020-04-22 21:02:46 +01:00
Merry
08c0cc84a8 Merge pull request #486 from lioncash/barrier
A32: Implement barrier instructions introduced in ARMv7
2020-04-22 21:02:46 +01:00
Lioncash
0b15fc9755 a32/fuzz_arm: Use same fuzzing mechanism as AArch64
Introduces the same fuzzing mechanism used by the AArch64 code for
fuzzing instruction implementations, getting rid of the need to
manually specify the instruction generator sequences--replacing it with
an instruction blacklist instead.

Much of this change originates from a previous patch made by Mary. This
just makes it interact nicely with the alterations made to get Unicorn
to cooperate properly.
2020-04-22 21:02:46 +01:00
Lioncash
0c43228ad5 frontend/A64/types: Use helper functions in operator+ overloads
Allows us to get rid of another explicit cast.
2020-04-22 21:02:46 +01:00
Mat M
07218df353 Merge pull request #485 from lioncash/a32
A32: Handle all ARM-mode arithmetic and data processing instructions added in ARMv6T2 and ARMv7
2020-04-22 21:02:46 +01:00
Lioncash
8316d231e9 A32: Implement barrier instructions introduced in ARMv7
Provides basic implementations of the barrier instruction introduced
within ARMv7. Currently these simply mirror the behavior of the AArch64
equivalents.
2020-04-22 21:02:46 +01:00
Lioncash
a1cace21a9 frontend/ir/ir_emitter: Apply const to locals where applicable
Makes const usage consistent with all other functions in the source
file.
2020-04-22 21:02:46 +01:00
Lioncash
d4a531c21f travis: Re-enable A32 tests 2020-04-22 21:02:46 +01:00
Lioncash
7fc3bd689d A32: Implement ARM-mode MLS 2020-04-22 21:02:46 +01:00
Lioncash
0a35836998 frontend/ir/ir_emitter: Use switch constructs in floating point opcodes where applicable
This'll reduce the amount of noise necessary in changes implementing
half-precision instructions, as the type can just be prepended to the
switch cases, instead of rewriting the whole if/else branch.
2020-04-22 21:02:46 +01:00
Lioncash
2acfee66ed a32_unicorn: Silence PC value assertions
Ensure the PC is properly masked off after a run.
2020-04-22 21:02:46 +01:00
Lioncash
8b338b7def A32: Implement ARM-mode MOVT 2020-04-22 21:02:46 +01:00
Lioncash
2641d410a4 travis: Amend build parameters
Currently just run the 64-bit tests.
2020-04-22 21:02:46 +01:00
Lioncash
877fa0f8c3 A32: Implement ARM-mode SBFX 2020-04-22 21:02:46 +01:00
Lioncash
57be160524 fuzz_arm: Tidy up existing tests
Now that we utilize C++17, we can use std::array's deduction guides to
avoid the need to explicitly specify the template arguments.

While we're at it, also use const where applicable.
2020-04-22 21:02:46 +01:00
Lioncash
47218ee65d A32: Implement ARM-mode UBFX 2020-04-22 21:02:46 +01:00
Lioncash
a77ca35ec3 Merge branch 'fuzz' 2020-04-22 21:02:46 +01:00
Lioncash
2970b34e3c A32: Implement ARM-mode BFI 2020-04-22 21:02:46 +01:00
Lioncash
c0ae23bbb7 A32/translate_thumb: Clean up formatting
Performs a similar tidying up of the Thumb translator, like what was
done with the regular ARM translator to make it consistent with the rest
of the codebase.

The A32 backend (both Thumb and ARM), will likely see more changes to it
in the near future, so this just acts as a "dusting off".
2020-04-22 21:02:46 +01:00
Lioncash
fab3a59e05 A32: Implement ARM-mode BFC 2020-04-22 21:02:46 +01:00
Merry
837c23a8ec Merge pull request #483 from lioncash/invert
frontend/ir/cond: Remove unused invert() function
2020-04-22 21:02:46 +01:00