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Author SHA1 Message Date
Wunkolo
0c67b913fe backend/x64: Add vcmp constants 2021-06-08 17:50:28 +01:00
Wunkolo
8fde505943 backend/x64: Add vfpclass constants 
Bit-wise constants for use with the `vfpclass` instruction.
 2021-06-08 17:50:28 +01:00
Wunkolo
c82e29ed82 backend/x64: Add vrange constants 
Adds compile-time `FpRangeLUT` for generating the 8-bit
immediate LUT value for the `vrange*` instruction
 2021-06-08 17:50:28 +01:00
MerryMage
c1d5a7977e Add Unsafe_IgnoreStandardFPCRValue optimization 2021-06-08 17:26:45 +01:00
Wunkolo
c157dfcc4c emit_x64_vector: Reduce gf2p8affineqb requirement to GFNI 
Currently, every usage of `gf2p8affineqb` is guarded by the
`AVX512F + AVX512VL + GFNI` requirement, when really
we only need `GFNI` on its own.

This will allow `GFNI`-only chips to get emit GFNI features without
needing to have AVX512 as well.
There _are_ chips in existance currently that strictly ship with GFNI and
have no implementation of AVX1/AVX2/AVX512(and thus no VEX/EVEX
encoding) such as Tremont(Lakefield) chips.
 2021-06-08 14:00:00 +01:00
Wunkolo
e47d0d11c3 emit_x64_vector: AVX512 implementation of EmitVectorNot 
Single in-place ternary logic instruction.
 2021-06-08 03:11:38 +01:00
Markus Wick
0c12614d1a A64/config.h: Split fastmem and page_table options. 
We might want to allocate different sizes for each of them.
e.g. for the unsafe fastmem approach without bounds checking.
Or for using the full 48bit adress range (with mirrors) by allocating our real arena as close to 1<<47 as possible.
 2021-06-06 17:25:51 +01:00
MerryMage
828959caed IR: Implement FPVector{To,From}Half32 
Implement ASIMD VCVT (half) in terms of this instruction.
Correct handling of ASIMDStandardValue.
 2021-06-05 03:39:48 +01:00
Wunkolo
9a23c09c3b emit_x64_floating_point: AVX implementation of ZeroIfNaN 2021-05-31 13:41:05 +01:00
Wunkolo
e9c5c01eda emit_x64{_vector}_floating_point: AVX512 implementation of ZeroIfNaN 
Using a single `vfixupimm` to turn `QNaN`/`SNan` to `+0`
 2021-05-31 13:39:56 +01:00
Wunkolo
fe5abdb3e1 backend/x64: Add vfixup constants 
Adds compile-time `FixupLUT` function for generating the 32-bit
LUT of src->dst mappings
 2021-05-31 13:39:56 +01:00
MerryMage
0a77ee1a58 tests: Format to clang-format mandated style 2021-05-31 12:54:27 +01:00
MerryMage
1d9a0415f9 github: Add clang-format action 2021-05-31 12:51:47 +01:00
MerryMage
bda1399a69 travis: Remove travis 2021-05-31 12:51:47 +01:00
merry
1672f907af github: Add build-and-test workflow 2021-05-31 12:51:47 +01:00
Lioncash
07710c89b6 CMakeLists: Add missing EXCLUDE_FROM_ALL specifiers 2021-05-31 11:20:45 +01:00
MerryMage
8235de9829 {a32,a64}_emit_x64: Fix fast_dispatch_table_lookup call in Unpatch on W^X systems 
fast_dispatch_table_lookup is in JITted code, and thus execution must be enabled before it can be called.
 2021-05-30 22:30:51 +01:00
MerryMage
0a98e5d3d7 exception_handler_*: Simplify message for case when exception is not our fault 2021-05-30 22:22:02 +01:00
MerryMage
9815502fee emit_x64_data_processing: operand in EmitExtractRegister is not modified 2021-05-30 22:18:21 +01:00
Markus Wick
36c3b289a0 fixup! a64/fastmem: Implement fastmem on 128 bit memory access. 2021-05-28 22:14:09 +01:00
Markus Wick
e82685223a a64/fastmem: Implement fastmem on 128 bit memory access. 2021-05-28 18:49:31 +01:00
Markus Wick
ff01b1c6f9 a64/fastmem: Only generate abort handler if needed. 
If fastmem fails, we call the callback from the signal handler. So this callback proxy in slowmem won't be used ever.
 2021-05-28 18:49:31 +01:00
Jeremy Van de woestyne
b4ee976a6f unit tests & various fixes 2021-05-28 18:49:31 +01:00
MerryMage
709773dcf1 a64_emit_x64: Implement fastmem for A64 frontend for 8-64 bit reads/writes 2021-05-28 18:49:31 +01:00
Merry
bbffae2f96 emit_x64_vector_saturation: AVX implementation of EmitVectorSignedSaturated 2021-05-28 15:34:49 +01:00
Merry
56e3bf57d2 emit_x64_vector_saturated: Consolidate unsigned operations into EmitVectorUnsignedSaturated 2021-05-28 15:34:49 +01:00
Merry
a76e8c8827 emit_x64_vector_saturation: Reduce esize noise in EmitVectorSignedSaturated 2021-05-28 15:34:49 +01:00
Merry
de31caca49 emit_x64_vector_saturation: AVX implementation of EmitVectorUnsignedSaturatedSub32 2021-05-28 15:34:49 +01:00
Merry
b46e6a24dc emit_x64_vector_saturation: AVX implementation of EmitVectorUnsignedSaturatedAdd32 2021-05-28 15:34:49 +01:00
Merry
d087ef42b9 emit_x64_vector_saturation: AVX implementation of EmitVectorUnsignedSaturatedSub32 2021-05-28 15:34:49 +01:00
Merry
0a232a6fbf emit_x64_vector_saturation: AVX2 implementation of EmitVectorUnsignedSaturatedAdd64 2021-05-28 15:34:49 +01:00
Wunkolo
57601f064b emit_x64_vector_saturation: AVX512 implementation of EmitVectorSignedSaturated 2021-05-28 15:34:49 +01:00
Wunkolo
332c26d432 emit_x64_vector_saturation: AVX512 implementation of VectorUnsignedSaturated{Add,Sub}{32,64} 2021-05-28 15:34:49 +01:00
Wunkolo
fa8cc1ac36 backend/x64: Add constants 
Used to redefine x86 assembly-constants without
including platform-dependent headers such as `immintrin.h`.

Currently includes vpcmp constants as well as ternary logic
utility-terms.

Removes `immintrin.h` requirement from emit_x64_vector_saturation
and updates our usage of `vpcmp` and `vpternlog` with the new constants
 2021-05-28 14:13:11 +01:00
Wunkolo
e8c266d0d3 tests/A64: Add VQADD/VQSUB unit tests 2021-05-28 14:13:11 +01:00
merry
8b4c73c833
README: Update readme 
- Add 'projects using' section
- Update guest architectures supported section
 2021-05-26 17:18:06 +01:00
MerryMage
6f87951178 externals: Remove unused submodule 2021-05-25 21:59:40 +01:00
MerryMage
f6f8024fb5 a32_emit_x64: Dump x64 disassembly upon fastmem patch failure 2021-05-25 21:57:29 +01:00
MerryMage
4256d21481 common: Add x64_disassemble 2021-05-25 21:56:59 +01:00
MerryMage
731c7fa4d9 externals: Build zydis 2021-05-25 21:32:34 +01:00
MerryMage
eed33f255d externals: Add zycore 
Merge commit '80d62f224900ab486a5bc5a6e80ce1e25a0e38e8' as 'externals/zycore'
 2021-05-25 21:28:58 +01:00
MerryMage
80d62f2249 Squashed 'externals/zycore/' content from commit 0c372cdef 
git-subtree-dir: externals/zycore
git-subtree-split: 0c372cdefe799e99812c008a0b74537bfa5fe077
 2021-05-25 21:28:55 +01:00
MerryMage
343b21ff7b externals: Add zydis 
Merge commit '6ee9beab3209bc301af98ee881bd15f0aeea2513' as 'externals/zydis'
 2021-05-25 21:23:45 +01:00
MerryMage
6ee9beab32 Squashed 'externals/zydis/' content from commit 25193db00 
git-subtree-dir: externals/zydis
git-subtree-split: 25193db008e8799ff59fd655c2a26b2ffd79d40d
 2021-05-25 21:23:39 +01:00
Mai M
fff4d9a4c7
Merge pull request #612 from Wunkolo/cpuinfo-concise 
cpu_info: Add CPU Name, Family, compact output
 2021-05-24 15:57:23 -04:00
Wunkolo
dc7fb1f3ed cpu_info: Add CPU Name, Family, compact output 
Compacts and formats the output a bit to be much more
concise. Sorts CPU features by alphabetical order. Mostly
to speed up `HostFeature` testing.
 2021-05-24 12:25:01 -07:00
MerryMage
17ae7f9ce1 IR: Implement IR instruction CallHostFunction 2021-05-23 15:44:57 +01:00
Wunkolo
3c693f2576 emit_x64_vector: AVX512VBMI implementation of EmitVectorTableLookup128 
Also adds AVX512VBMI detection to host_feature
 2021-05-22 22:48:31 +01:00
Wunkolo
37b24ee29e emit_x64_vector: AVX512{VL+BW} implementation of EmitVectorTableLookup128 
Based off of the SSE41 implementation but utilizing
embedded broadcasting, mask registers, and
the special zero-mask to default-initialize out-of-bound
indices to zero in the `is_defaults_zero` case.
 2021-05-22 22:47:21 +01:00
Wunkolo
9ba5e8e52d tests/A64: Add TBL/TBX instruction unit tests 
Tests the TBL instruction with implementation with {1-4} register
lookups and the handling of out-of-bound indices.
Intended to target the implementation of VectorTableLookup128
 2021-05-22 22:47:21 +01:00