Lioncash
ccef85dbb7
A64: Implement AESE
2020-04-22 20:46:13 +01:00
MerryMage
68f46c8334
backend_x64: Use a reference to BlockOfCode instead of a pointer
2020-04-22 20:46:13 +01:00
MerryMage
8931ee346b
IR: Add IR instruction NZCVFromPackedFlags
...
This instruction expects NZCV to be in the high bits.
i.e.: The positions they were in PSTATE.
2020-04-22 20:46:13 +01:00
MerryMage
0bb4474fb9
A64: Implement INS (general)
2020-04-22 20:46:13 +01:00
MerryMage
d13704fdef
A64: Implement INS (element)
2020-04-22 20:46:13 +01:00
MerryMage
0642d49919
A64: Implement SMOV
2020-04-22 20:46:13 +01:00
MerryMage
5297027ebe
A64: Implement UMOV
2020-04-22 20:46:13 +01:00
MerryMage
47661b746b
basic_block: Fix bogus GCC maybe-uninitialized warning
2020-04-22 20:46:13 +01:00
MerryMage
1fb0957aa3
A64: Implement FCVT
2020-04-22 20:46:13 +01:00
MerryMage
ca38225e08
fuzz_with_unicorn: Skip instructions that need to be interpreted
2020-04-22 20:46:13 +01:00
MerryMage
4be55b8b84
A64: Implement FMOV (scalar, immediate)
2020-04-22 20:46:13 +01:00
MerryMage
a07c05ea51
A64: Implement STUR (SIMD&FP), LDUR (SIMD&FP)
2020-04-22 20:46:13 +01:00
MerryMage
93fcbdf1e2
A64: Implement FCMP, FCMPE
2020-04-22 20:46:13 +01:00
MerryMage
75b8a76630
a64_jitstate: A64 does not have a seperate FPSCR.NZCV
2020-04-22 20:46:13 +01:00
MerryMage
99d8ebe4d5
A64: Implement FMUL (scalar), FDIV (scalar), FADD (scalar), FSUB (scalar), FNMUL (scalar)
2020-04-22 20:46:13 +01:00
MerryMage
429dc24587
IR: Merge U32 and U64 variants of FP instructions
2020-04-22 20:46:13 +01:00
MerryMage
ed2bedec43
A64: Implement {ST,LD}{1,2,3,4} (multiple structures)
2020-04-22 20:46:13 +01:00
MerryMage
6414736a8d
emit_x64_vector: bug: VectorGetElement8 returning incorrect values for non-SSE4.1
...
This bug wasn't discovered earlier because we previously only used index == 0.
2020-04-22 20:46:13 +01:00
MerryMage
ebfc51c609
IR: Implement VectorSetElement{8,16,32,64}
2020-04-22 20:46:13 +01:00
Lioncash
a5c4fbc783
A64: Implement AESIMC and AESMC
2020-04-22 20:46:13 +01:00
Lioncash
744495e23d
iterator_util: Make Reverse constexpr
...
C++17 makes non-member rbegin(), rend(), crbegin(), and crend() constexpr, allowing this to also be constexpr.
2020-04-22 20:46:12 +01:00
Lioncash
ab9b5fb8aa
Common: Relocate common bits of CRC32
...
Allows the algorithm to be used in any other potential backend.
2020-04-22 20:46:12 +01:00
Lioncash
af1384d700
A64: Implement CRC32
2020-04-22 20:46:12 +01:00
MerryMage
01b4395bf8
travis: Bump MACOSX_DEPLOYMENT_TARGET
2020-04-22 20:46:12 +01:00
MerryMage
7e0f14303c
fuzz_with_unicorn: Print information on test failure
2020-04-22 20:46:12 +01:00
MerryMage
64761dbc72
scope_exit: Add SCOPE_SUCCESS and SCOPE_EXIT
2020-04-22 20:46:12 +01:00
MerryMage
bafb39ebc5
A64: Add Disassemble method
2020-04-22 20:46:12 +01:00
MerryMage
cc0eb18a0b
A32: data_processing: Remove !S assertions
2020-04-22 20:46:12 +01:00
MerryMage
865a30eb0d
A32: Implement BKPT
2020-04-22 20:46:12 +01:00
MerryMage
f023bbb893
A32: Add ExceptionRaised IR instruction and use it
2020-04-22 20:46:12 +01:00
Lioncash
7ffbebf290
A64: Implement CRC32C
2020-04-22 20:46:12 +01:00
MerryMage
d7044bc751
assert: Use fmt in ASSERT_MSG
2020-04-22 20:46:12 +01:00
Lioncash
b60c7f31c1
externals: Update catch to v2.1.1
...
Brings in a few minor improvements like proper stringification of static arrays.
2020-04-22 20:46:12 +01:00
Lioncash
71422c2b48
fuzz_with_unicorn: Move data outside loop
...
Given we know we're only ever going to use one instruction, we can just presize the vector and reassign to it
instead of potentially reallocating the same memory 100000 times
2020-04-22 20:46:12 +01:00
Lioncash
cd69c6a17c
fuzz_with_unicorn: Dehardcode some constants
2020-04-22 20:46:12 +01:00
MerryMage
52268298a8
a64_emit_x64: Perform RSB predictions
2020-04-22 20:46:12 +01:00
MerryMage
98ec9c5f90
A32: Change UserCallbacks to be similar to A64's interface
2020-04-22 20:46:12 +01:00
Lioncash
b9ce660113
reg_alloc: std::move RegAlloc's function argument
2020-04-22 20:46:12 +01:00
Lioncash
ed561d6653
General: Add missing override specifiers
2020-04-22 20:46:12 +01:00
MerryMage
b2d99eddc6
EmitZeroExtendLongToQuad: Do not rely on register allocator to zero extend 64->128
2020-04-22 20:46:12 +01:00
MerryMage
f4f774f9f6
a64_get_set_elimination_pass: Simplify algorithm
2020-04-22 20:46:12 +01:00
MerryMage
54de64f5bf
a64_emit_x64: bug: x64 sign-extends 32-bit immediates
2020-04-22 20:46:12 +01:00
MerryMage
6fc228f7fd
ir_opt: Add A64 Get/Set Elimination Pass
2020-04-22 20:46:12 +01:00
MerryMage
e01b500aea
ir_emitter: Allow the insertion point for new instructions to be set
2020-04-22 20:46:12 +01:00
MerryMage
af793c2527
{a32,a64}_interface: Predict entrypoint
2020-04-22 20:46:12 +01:00
Lioncash
7734cf1050
A64: Implement EXTR
2020-04-22 20:46:12 +01:00
MerryMage
9fb82036ca
Squashed 'externals/xbyak/' changes from d512551e..2794cde7
...
2794cde7 add xword, yword, etc. in Xbyak::util
fb9c04e4 fix document for vfpclassps
a51be78b fix test dependency
04fdfb1e update version
e6354f8b add vgf2p8mulb
09a12642 add gf2p8affineqb
d171ba0e add gf2p8affineinvqb
457f4fd0 add vpshufbitqmb
5af0ba39 add vpexpand{b,w}
e450f965 vpopcnt{d,q} supports ptr_b
48499eb1 add vpdpbusd(s), vpdpwssd(s)
9c745109 add vpdpbusd, vpdpbusds
0e1a11b4 add vpopcnt{b,w,d,q}
9acfc132 add vpshrd(v){w,d,q}
ac8de850 add vpshld(v){w,d,q}
f181c259 add vcompressb, vcompressw
5a402477 vpclmulqdq supports AVX-512
9e16b40b vaes* supports AVX-512
7fde08e0 add flags for intel's manual 319433-030.pdf
c5da3778 add test of v4fmaddps, vp4dpwssd, etc.
e4fc9d8a fix mpx encoding
d0b2fb62 add bnd(0xf2) prefix for MPX
f12b5678 use db for array
cd74ab44 remove bat file
git-subtree-dir: externals/xbyak
git-subtree-split: 2794cde79eb71e86490061cac9622ad0067b8d15
2020-04-22 20:45:52 +01:00
MerryMage
e1fd6038a2
externals: Update xbyak to v5.601
...
Merge commit '9fb82036ca94cd726a2f73db8d68c6e306c216fe' into HEAD
2020-04-22 20:45:52 +01:00
MerryMage
88ae7fce52
A64: Implement LDP (SIMD&FP) and STP (SIMD&FP)
2020-04-22 20:44:38 +01:00
MerryMage
d497464c9f
a64_jitstate: Have 128-bit wide spills
2020-04-22 20:44:38 +01:00
