Lioncash
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ae5dbcbed6
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A64: Implement HINT, NOP, YIELD, WFE, WFI, SEV, and SEVL
Truly the most difficult A64 instructions to implement.
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2020-04-22 20:42:46 +01:00 |
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Lioncash
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4d8f4aa8af
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A64: Implement ASRV, LSLV, LSRV, and RORV
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2020-04-22 20:42:46 +01:00 |
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Lioncash
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a8a65beb2b
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data_processsing_conditional_select: Implement CSINC, CSINV and CSNEG
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2020-04-22 20:42:46 +01:00 |
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MerryMage
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f81d0a2536
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A64: Implement AND (vector)
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2020-04-22 20:42:46 +01:00 |
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MerryMage
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a63fc6c89b
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A64: Implement ADD (vector, vector)
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2020-04-22 20:42:46 +01:00 |
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Thomas Guillemard
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896cf44f96
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A64: Implement REV, REV32, and REV16 (#126)
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2020-04-22 20:42:46 +01:00 |
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MerryMage
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144b629d8a
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A64: Implement CSEL
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2020-04-22 20:42:45 +01:00 |
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MerryMage
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9f57283a30
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A64: Implement SBFM, BFM, UBFM
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2020-04-22 20:42:45 +01:00 |
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MerryMage
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cdbc8d07a5
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A64: Implement MOVN, MOVZ, MOVK
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2020-04-22 20:42:45 +01:00 |
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MerryMage
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b34c6616d4
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A64/decoder: Split decoder data from header
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2020-04-22 20:42:45 +01:00 |
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MerryMage
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243f06c613
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A64: Implement LDP, STP
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2020-04-22 20:42:45 +01:00 |
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MerryMage
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25411da838
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A32: Implement load stores (immediate)
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2020-04-22 20:42:45 +01:00 |
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MerryMage
|
68391b0a05
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A64: Implement SVC
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2020-04-22 20:42:45 +01:00 |
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MerryMage
|
cb481a3a48
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A64: Implement compare and branch
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2020-04-22 20:42:45 +01:00 |
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MerryMage
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23f3afe0b3
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A64: Implement branch (register)
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2020-04-22 20:42:45 +01:00 |
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MerryMage
|
86d1095df7
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A64: Implement branch
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2020-04-22 20:42:45 +01:00 |
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MerryMage
|
0641445e51
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A64: Implement logical
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2020-04-22 20:42:45 +01:00 |
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MerryMage
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5a1d88c5dc
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A64: Implement pcrel
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2020-04-22 20:42:45 +01:00 |
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MerryMage
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c09e69bb97
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A64: Implement addsub instructions
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2020-04-22 20:42:44 +01:00 |
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MerryMage
|
d1cef6ffb0
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A64: Implement ADD_shifted
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2020-04-22 20:42:44 +01:00 |
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MerryMage
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e161cf16f5
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A64: Initial framework
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2020-04-22 20:42:44 +01:00 |
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